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Message-ID: <57leox2rgsdbcrgqrghyq7h5te545by33hmkscjdj3ttedo6yk@4nwwtecdw77w>
Date: Sat, 26 Apr 2025 01:07:45 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Jessica Zhang <jesszhan@...cinc.com>,
Abhinav Kumar <abhinavk@...cinc.com>, Abel Vesa <abel.vesa@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH RFC/WIP 0/4] arm64: dts: qcom: sm8750: Enable display
On Fri, Apr 25, 2025 at 09:54:47PM +0200, Krzysztof Kozlowski wrote:
> On 25/04/2025 21:34, Dmitry Baryshkov wrote:
> > On Thu, Apr 24, 2025 at 03:04:24PM +0200, Krzysztof Kozlowski wrote:
> >> DTS is ready and I consider it ready for review, but still RFC because:
> >> 1. Display has unresolved issues which might result in change in
> >> bindings (clock parents),
> >> 2. I did not test it since some time on my board...
> >> 3. Just want to share it fast to unblock any dependent work.
> >>
> >> DTS build dependencies - as in b4 deps, so:
> >> https://lore.kernel.org/r/20250421-sm8750_usb_master-v5-0-25c79ed01d02@oss.qualcomm.com/
> >> https://lore.kernel.org/r/20250424-sm8750-audio-part-2-v1-0-50133a0ec35f@linaro.org/
> >> https://lore.kernel.org/r/20250113-sm8750_gpmic_master-v1-2-ef45cf206979@quicinc.com/
> >>
> >> Bindings:
> >> 1. Panel: https://github.com/krzk/linux/tree/b4/sm8750-display-panel
> >> 2. MDSS: https://lore.kernel.org/r/20250311-b4-sm8750-display-v4-0-da6b3e959c76@linaro.org/
> >>
> >> Patchset based on next-20250424.
> >
> > If the DisplayPort works on this platform, I'd kindly ask to send
> > separate DP+DPU only series (both driver and arm64/dts). It would make
> > it much easier (at least for me) to land the series, while you and
> > Qualcomm engineers are working on the DSI issues.
> DP has also issues - link training failures,
Some of the platforms have DP lanes inverted between DP and PHY. See
patches posted for QCS615. Might it be that it is the case for SM8750
too?
> although it feels as
> different one, because DSI issue Jessica narrowed to DSI PHY PLL VCO
> rate and I have a working display (just don't know how to actually solve
> this).
>
> Best regards,
> Krzysztof
--
With best wishes
Dmitry
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