linux-kernel - Re: [PATCH] LoongArch: KVM: Fully clear some registers when VM reboot

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Message-ID: <CAAhV-H5taW2fAGW8CQ7MF5wjW8nuYREcNd6SSmvBmCtoJta5rQ@mail.gmail.com>
Date: Sat, 26 Apr 2025 18:20:25 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: bibo mao <maobibo@...ngson.cn>
Cc: Tianrui Zhao <zhaotianrui@...ngson.cn>, WANG Xuerui <kernel@...0n.name>, kvm@...r.kernel.org, 
	loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] LoongArch: KVM: Fully clear some registers when VM reboot

On Thu, Apr 24, 2025 at 3:07 PM bibo mao <maobibo@...ngson.cn> wrote:
>
>
>
> On 2025/4/24 下午2:53, Huacai Chen wrote:
> > Hi, Bibo,
> >
> > On Thu, Apr 24, 2025 at 2:38 PM Bibo Mao <maobibo@...ngson.cn> wrote:
> >>
> >> Some registers such as LOONGARCH_CSR_ESTAT and LOONGARCH_CSR_GINTC
> >> are partly cleared with function _kvm_set_csr(). This comes from hardware
> > I cannot find the _kvm_set_csr() function, maybe it's a typo?
> oop, it is _kvm_setcsr(), will refresh in next version.
>
> > And the tile can be "LoongArch: KVM: Fully clear some CSRs when VM reboot"
> yeap, this title is more suitable.
Already applied with those modifications.

Huacai

>
> Regards
> Bibo Mao
> >
> > Huacai
> >
> >> specification, some bits are read only in VM mode, and however it can be
> >> written in host mode. So it is partly cleared in VM mode, and can be fully
> >> cleared in host mode.
> >>
> >> These read only bits show pending interrupt or exception status. When VM
> >> reset, the read-only bits should be cleared, otherwise vCPU will receive
> >> unknown interrupts in boot stage.
> >>
> >> Here registers LOONGARCH_CSR_ESTAT/LOONGARCH_CSR_GINTC are fully cleared
> >> in ioctl KVM_REG_LOONGARCH_VCPU_RESET vCPU reset path.
> >>
> >> Signed-off-by: Bibo Mao <maobibo@...ngson.cn>
> >> ---
> >>   arch/loongarch/kvm/vcpu.c | 8 ++++++++
> >>   1 file changed, 8 insertions(+)
> >>
> >> diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
> >> index 8e427b379661..80b2316d6f58 100644
> >> --- a/arch/loongarch/kvm/vcpu.c
> >> +++ b/arch/loongarch/kvm/vcpu.c
> >> @@ -902,6 +902,14 @@ static int kvm_set_one_reg(struct kvm_vcpu *vcpu,
> >>                          vcpu->arch.st.guest_addr = 0;
> >>                          memset(&vcpu->arch.irq_pending, 0, sizeof(vcpu->arch.irq_pending));
> >>                          memset(&vcpu->arch.irq_clear, 0, sizeof(vcpu->arch.irq_clear));
> >> +
> >> +                       /*
> >> +                        * When vCPU reset, clear the ESTAT and GINTC registers
> >> +                        * And the other CSR registers are cleared with function
> >> +                        * _kvm_set_csr().
> >> +                        */
> >> +                       kvm_write_sw_gcsr(vcpu->arch.csr, LOONGARCH_CSR_GINTC, 0);
> >> +                       kvm_write_sw_gcsr(vcpu->arch.csr, LOONGARCH_CSR_ESTAT, 0);
> >>                          break;
> >>                  default:
> >>                          ret = -EINVAL;
> >>
> >> base-commit: 9d7a0577c9db35c4cc52db90bc415ea248446472
> >> --
> >> 2.39.3
> >>
> >>
>