linux-kernel - [PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC

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Message-Id: <20250428-cv18xx-mbox-v3-2-ed18dfd836d1@pigmoral.tech>
Date: Mon, 28 Apr 2025 20:39:45 +0800
From: Junhui Liu <junhui.liu@...moral.tech>
To: Jassi Brar <jassisinghbrar@...il.com>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>, 
 Inochi Amaoto <inochiama@...il.com>, Yuntao Dai <d1581209858@...e.com>, 
 Junhui Liu <junhui.liu@...moral.tech>, 
 Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, 
 Alexandre Ghiti <alex@...ti.fr>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
 sophgo@...ts.linux.dev, linux-riscv@...ts.infradead.org
Subject: [PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series
 SoC

From: Yuntao Dai <d1581209858@...e.com>

Add mailbox node for Sophgo CV18XX series SoC.

Signed-off-by: Yuntao Dai <d1581209858@...e.com>
Signed-off-by: Junhui Liu <junhui.liu@...moral.tech>
---
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index c18822ec849f353bc296965d2d600a3df314cff6..f7277288f03c024039054bdc4176fc95c2c8be52 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -55,6 +55,13 @@ soc {
 		dma-noncoherent;
 		ranges;
 
+		mailbox: mailbox@...0000 {
+			compatible = "sophgo,cv1800b-mailbox";
+			reg = <0x01900000 0x1000>;
+			interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
 		clk: clock-controller@...2000 {
 			reg = <0x03002000 0x1000>;
 			clocks = <&osc>;

-- 
2.49.0