linux-kernel - Re: [BUG] perf segfaults when combining --overwrite and intel

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Message-ID: <20250428124727.GE551819@e132581.arm.com>
Date: Mon, 28 Apr 2025 13:47:27 +0100
From: Leo Yan <leo.yan@....com>
To: Tomas Glozar <tglozar@...hat.com>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	Namhyung Kim <namhyung@...nel.org>,
	linux-perf-users@...r.kernel.org,
	LKML <linux-kernel@...r.kernel.org>,
	Wander Costa <wcosta@...hat.com>
Subject: Re: [BUG] perf segfaults when combining --overwrite and intel_pt
 event

On Mon, Apr 28, 2025 at 12:45:41PM +0200, Tomas Glozar wrote:

> Thank you for looking at this. The initial segfault on writing to
> read-only page is fixed,

Thanks a lot for testing, Tomas!

> however, perf now segfaults in a different place:


> (gdb) r
> Starting program: /home/tglozar/dev/linux/tools/perf/perf record
> --overwrite -a -e intel_pt/cyc,noretcomp/k sleep 5
> [Thread debugging using libthread_db enabled]
> Using host libthread_db library "/lib64/libthread_db.so.1".
> [Detaching after fork from child process 424037]
> [New Thread 0x7ffff2df46c0 (LWP 424038)]
> [ perf record: Woken up 1 times to write data ]
> Thread 1 "perf" received signal SIGSEGV, Segmentation fault.
> intel_pt_info_fill (itr=0x7a1e40, session=0x794ef0,
> auxtrace_info=0x7cdfd0, priv_size=144) at arch/x86/util/intel-pt.c:361
> 361             pc = session->evlist->mmap[0].core.base;

Yes, this is a different issue, it would be fixed by:

diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c
index 8f235d8b67b6..42f0dbfa973c 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -322,7 +322,7 @@ static int intel_pt_info_fill(struct auxtrace_record *itr,
 	struct intel_pt_recording *ptr =
 			container_of(itr, struct intel_pt_recording, itr);
 	struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
-	struct perf_event_mmap_page *pc;
+	struct perf_event_mmap_page *pc = NULL;
 	struct perf_tsc_conversion tc = { .time_mult = 0, };
 	bool cap_user_time_zero = false, per_cpu_mmaps;
 	u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit;
@@ -358,7 +358,11 @@ static int intel_pt_info_fill(struct auxtrace_record *itr,
 	if (!session->evlist->core.nr_mmaps)
 		return -EINVAL;
 
-	pc = session->evlist->mmap[0].core.base;
+	if (session->evlist->mmap)
+		pc = session->evlist->mmap[0].core.base;
+	else if (session->evlist->mmap_ovw)
+		pc = session->evlist->mmap_ovw[0].core.base;
+
 	if (pc) {
 		err = perf_read_tsc_conversion(pc, &tc);
 		if (err) {

I would leave this fix to the Intel-PT developers, who know this part
best.

Thanks,
Leo