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Message-ID: <CAH1PCMZC5xrX07rd5bo+06zJoJDiAH3UNHqH5catwEALNJL2dQ@mail.gmail.com>
Date: Mon, 28 Apr 2025 20:46:50 +0800
From: Guodong Xu <guodong@...cstar.com>
To: Uwe Kleine-König <ukleinek@...nel.org>
Cc: robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
alex@...ti.fr, dlan@...too.org, p.zabel@...gutronix.de, drew@...7.com,
inochiama@...il.com, geert+renesas@...der.be, heylenay@....org,
tglx@...utronix.de, hal.feng@...rfivetech.com, unicorn_wang@...look.com,
duje.mihanovic@...le.hr, elder@...cstar.com, linux-pwm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, spacemit@...ts.linux.dev
Subject: Re: [PATCH v2 3/6] riscv: dts: spacemit: add PWM support for K1 SoC
On Thu, Apr 24, 2025 at 4:18 PM Uwe Kleine-König <ukleinek@...nel.org> wrote:
>
> Hello,
>
> On Sun, Apr 20, 2025 at 03:02:48PM +0800, Guodong Xu wrote:
> > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > index c0cc4b99c935..e7dba623e877 100644
> > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> > @@ -556,5 +556,185 @@ sec_uart1: serial@...12000 {
> > reg-io-width = <4>;
> > status = "reserved"; /* for TEE usage */
> > };
> > +
> > + pwm0: pwm@...1a000 {
> > + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
> > + reg = <0x0 0xd401a000 0x0 0x10>;
> > + #pwm-cells = <1>;
>
> I want to make all pwms use #pwm-cells = <3> in the long run. Can you
Sure. I can do this.
> please use that for the new binding? (Of course this needs adaption in
> the binding doc, the code should already be prepared for that.)
>
I got what you mean. The code change for that is already integrated into
v6.15-rc1.
Commit 895fe4537cc8 ("pwm: Add upgrade path to #pwm-cells = <3> for users of
of_pwm_single_xlate()")
Now, if I change this #pwm-cells from <1> to <3>, without the dt-binding doc
changes, I would expect to see warnings (" #pwm-cells: 1 was expected") during
make dtbs_check W=3
Any suggestions when the dt-binding changes will be merged?
or I can add your patch as a dependency.
https://lore.kernel.org/all/cb799d8a5bb284cd861785a691b8d5e329300d99.1738842938.git.u.kleine-koenig@baylibre.com/
> > + clocks = <&syscon_apbc CLK_PWM0>;
> > + resets = <&syscon_apbc RESET_PWM0>;
> > + status = "disabled";
> > + };
>
> The error that the build bot reports happens (I think) because CLK_PWM0
> isn't known.
>
Yes, thanks for checking. This patchset depends on the clk and reset.
I will add them as prerequisite.
-Guodong
> Best regards
> Uwe
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