linux-kernel - Re: [PATCH v3 1/1] KVM: arm64: Allow cacheable stage 2 mapping using VMA flags

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Message-ID: <20250429164430.GD2260709@nvidia.com>
Date: Tue, 29 Apr 2025 13:44:30 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Catalin Marinas <catalin.marinas@....com>
Cc: Ankit Agrawal <ankita@...dia.com>,
	Oliver Upton <oliver.upton@...ux.dev>,
	Sean Christopherson <seanjc@...gle.com>,
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Subject: Re: [PATCH v3 1/1] KVM: arm64: Allow cacheable stage 2 mapping using
 VMA flags

On Tue, Apr 29, 2025 at 05:03:18PM +0100, Catalin Marinas wrote:
> On Tue, Apr 29, 2025 at 11:14:37AM -0300, Jason Gunthorpe wrote:
> > On Tue, Apr 29, 2025 at 02:27:02PM +0100, Catalin Marinas wrote:
> > > BTW, we should reject exec mappings as well (they probably fail for S1
> > > VFIO since set_pte_at() will try to do cache maintenance).
> > 
> > To be clear the S2 should leave the mapping as execute allowed
> > though. Only the VM knows how it will use this memory and VM's do
> > actually execute out of the cachable PFNMAP VMA today. The VM will set
> > any execute deny/allow on its S1 table according to how it uses the
> > memory.
> 
> If S2 is executable, wouldn't KVM try to invalidate the I-cache and it
> won't have an alias to do this? Unless it doesn't end up in
> stage2_map_walker_try_leaf() or the walk has been flagged as skipping
> the CMO.

Okay, that does seem to have been overlooked a bit. The answer I got
back is:

Cachable PFNMAP is also relying on ARM64_HAS_CACHE_DIC also, simlar to
how S2FWB allows KVM to avoid flushing the D cache, that CPU cap
allows KVM to avoid flushing the icache and turns icache_inval_pou()
into a NOP.

Ankit, you should add that check as well..

Thanks,
Jason