[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <cce60805-55e5-4fb8-9f71-7afcc496c689@163.com>
Date: Tue, 29 Apr 2025 16:21:19 +0800
From: Hans Zhang <18255117159@....com>
To: Niklas Cassel <cassel@...nel.org>
Cc: lpieralisi@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
jingoohan1@...il.com, manivannan.sadhasivam@...aro.org, robh@...nel.org,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] PCI: dwc: Standardize link status check to return
bool
On 2025/4/29 16:05, Niklas Cassel wrote:
> Hello Hans,
>
> On Tue, Apr 29, 2025 at 01:10:25AM +0800, Hans Zhang wrote:
>> Modify link_up functions across multiple DWC PCIe controllers to return
>> bool instead of int. Simplify conditional checks by directly returning
>> logical evaluations. This improves code clarity and aligns with PCIe
>> status semantics.
>>
>> Signed-off-by: Hans Zhang <18255117159@....com>
>> ---
>> drivers/pci/controller/dwc/pci-dra7xx.c | 2 +-
>> drivers/pci/controller/dwc/pci-exynos.c | 4 ++--
>> drivers/pci/controller/dwc/pci-keystone.c | 5 ++---
>> drivers/pci/controller/dwc/pci-meson.c | 6 +++---
>> drivers/pci/controller/dwc/pcie-armada8k.c | 6 +++---
>> drivers/pci/controller/dwc/pcie-designware.c | 2 +-
>> drivers/pci/controller/dwc/pcie-designware.h | 4 ++--
>> drivers/pci/controller/dwc/pcie-dw-rockchip.c | 2 +-
>> drivers/pci/controller/dwc/pcie-histb.c | 9 +++------
>> drivers/pci/controller/dwc/pcie-keembay.c | 2 +-
>> drivers/pci/controller/dwc/pcie-kirin.c | 7 ++-----
>> drivers/pci/controller/dwc/pcie-qcom-ep.c | 4 ++--
>> drivers/pci/controller/dwc/pcie-qcom.c | 2 +-
>> drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +-
>> drivers/pci/controller/dwc/pcie-spear13xx.c | 7 ++-----
>> drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
>> drivers/pci/controller/dwc/pcie-uniphier.c | 2 +-
>> drivers/pci/controller/dwc/pcie-visconti.c | 2 +-
>> 18 files changed, 30 insertions(+), 40 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
>> index 33d6bf460ffe..4ef25d14312b 100644
>> --- a/drivers/pci/controller/dwc/pci-dra7xx.c
>> +++ b/drivers/pci/controller/dwc/pci-dra7xx.c
>> @@ -118,7 +118,7 @@ static u64 dra7xx_pcie_cpu_addr_fixup(struct dw_pcie *pci, u64 cpu_addr)
>> return cpu_addr & DRA7XX_CPU_TO_BUS_ADDR;
>> }
>>
>> -static int dra7xx_pcie_link_up(struct dw_pcie *pci)
>> +static bool dra7xx_pcie_link_up(struct dw_pcie *pci)
>> {
>> struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);
>> u32 reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_PHY_CS);
>> diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controller/dwc/pci-exynos.c
>> index ace736b025b1..d4a25d376b11 100644
>> --- a/drivers/pci/controller/dwc/pci-exynos.c
>> +++ b/drivers/pci/controller/dwc/pci-exynos.c
>> @@ -209,12 +209,12 @@ static struct pci_ops exynos_pci_ops = {
>> .write = exynos_pcie_wr_own_conf,
>> };
>>
>> -static int exynos_pcie_link_up(struct dw_pcie *pci)
>> +static bool exynos_pcie_link_up(struct dw_pcie *pci)
>> {
>> struct exynos_pcie *ep = to_exynos_pcie(pci);
>> u32 val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_RDLH_LINKUP);
>>
>> - return (val & PCIE_ELBI_XMLH_LINKUP);
>> + return !!(val & PCIE_ELBI_XMLH_LINKUP);
>
> !! is not needed here, or in other places.
>
> When assigning to the bool any non-zero value becomes 1.
>
> !! is usually only needed when needing to store an explicit 1 or 0 in an int.
>
Dear Niklas,
Thank you very much for your reply and reminder. The next version will
be modified.
Best regards,
Hans
Powered by blists - more mailing lists