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Message-ID: <e80be47b-5f8d-409c-8c3d-cd1af46944d0@kernel.org>
Date: Wed, 30 Apr 2025 14:05:44 -0500
From: Mario Limonciello <superm1@...nel.org>
To: Borislav Petkov <bp@...en8.de>
Cc: Jean Delvare <jdelvare@...e.com>, Andi Shyti <andi.shyti@...nel.org>,
 Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
 Jonathan Corbet <corbet@....net>,
 Mario Limonciello <mario.limonciello@....com>,
 Yazen Ghannam <yazen.ghannam@....com>, Thomas Gleixner <tglx@...utronix.de>,
 Ingo Molnar <mingo@...hat.com>, Dave Hansen <dave.hansen@...ux.intel.com>,
 "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
 "H . Peter Anvin" <hpa@...or.com>,
 Shyam Sundar S K <Shyam-sundar.S-k@....com>,
 Hans de Goede <hdegoede@...hat.com>,
 "open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
 open list <linux-kernel@...r.kernel.org>,
 "open list:I2C/SMBUS CONTROLLER DRIVERS FOR PC" <linux-i2c@...r.kernel.org>,
 "open list:AMD PMC DRIVER" <platform-driver-x86@...r.kernel.org>
Subject: Re: [PATCH v5 5/5] x86/CPU/AMD: Print the reason for the last reset

On 4/30/2025 2:03 PM, Borislav Petkov wrote:
> On Tue, Apr 22, 2025 at 06:48:30PM -0500, Mario Limonciello wrote:
>> +	/* Iterate on each bit in the 'value' mask: */
>> +	while (true) {
>> +		bit = find_next_bit(&value, BITS_PER_LONG, bit + 1);
>> +
>> +		/* Reached the end of the word, no more bits: */
>> +		if (bit >= BITS_PER_LONG) {
>> +			if (!nr_reasons)
>> +				pr_info("x86/amd: Previous system reset reason [0x%08lx]: Unknown\n", value);
>> +			break;
>> +		}
>> +
>> +		if (!s5_reset_reason_txt[bit])
>> +			continue;
>> +
>> +		nr_reasons++;
>> +		pr_info("x86/amd: Previous system reset reason [0x%08lx]: %s\n",
>> +			value, s5_reset_reason_txt[bit]);
>> +	}
> 
> What happened to that simpler idea:
> 
> https://lore.kernel.org/r/20250411125050.GEZ_kQKtYBfEMDQuXU@fat_crate.local
> 

This one was more advantageous in that if multiple bits were set for any 
reason we could get messages for all of them printed.

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