[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20250430082517.GBaBHebXphwVNGqbsQ@fat_crate.local>
Date: Wed, 30 Apr 2025 10:25:17 +0200
From: Borislav Petkov <bp@...en8.de>
To: "Kaplan, David" <David.Kaplan@....com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Peter Zijlstra <peterz@...radead.org>,
Josh Poimboeuf <jpoimboe@...nel.org>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>,
"H . Peter Anvin" <hpa@...or.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 16/16] x86/bugs: Restructure SRSO mitigation
On Tue, Apr 29, 2025 at 05:18:27PM +0000, Kaplan, David wrote:
> The comment doesn't make any sense in the new structure. In the old code,
> SBPB gets enabled at the start of the function, before we check if you're on
> a Zen1/2 with SMT off. The comment arguably made some sense in the old code
> because you're disabling SRSO mitigations but after you had done the SBPB
> check...but the comment is pointing out this is ok because these CPUs never
> support SBPB anyway. Normally, if SRSO is off, you try to use SBPB.
Ok, lemme add a note about that in the commit message.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
Powered by blists - more mailing lists