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Message-ID: <c86eb414-d11e-4e68-a61d-6034f989a71d@quicinc.com>
Date: Fri, 2 May 2025 16:37:13 +0530
From: Imran Shaik <quic_imrashai@...cinc.com>
To: Taniya Das <quic_tdas@...cinc.com>,
Bjorn Andersson
<andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
"Stephen
Boyd" <sboyd@...nel.org>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
Jagadeesh Kona
<quic_jkona@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/2] clk: qcom: gcc: Set FORCE_MEM_CORE_ON for
gcc_ufs_axi_clk for 8650/8750
On 4/14/2025 2:30 PM, Taniya Das wrote:
> Update the force mem core bit for UFS AXI clock to force the core on
> signal to remain active during halt state of the clk. If force mem
> core bit of the clock is not set, the memories of the subsystem will
> not retain the logic across power states. This is required for the MCQ
> feature of the UFS driver.
>
> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
> ---
> drivers/clk/qcom/gcc-sm8650.c | 2 ++
> drivers/clk/qcom/gcc-sm8750.c | 3 ++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
Reviewed-by: Imran Shaik <quic_imrashai@...cinc.com>
Thanks,
Imran
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