linux-kernel - Re: [PATCH v2 4/9] dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller

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Message-ID: <20250506-vocation-herbs-a2c84688ce03@spud>
Date: Tue, 6 May 2025 17:24:33 +0100
From: Conor Dooley <conor@...nel.org>
To: Ben Zong-You Xie <ben717@...estech.com>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org, paul.walmsley@...ive.com,
	palmer@...belt.com, aou@...s.berkeley.edu, alex@...ti.fr,
	robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
	tglx@...utronix.de, daniel.lezcano@...aro.org,
	prabhakar.mahadev-lad.rj@...renesas.com, tim609@...estech.com
Subject: Re: [PATCH v2 4/9] dt-bindings: interrupt-controller: add Andes
 machine-level software interrupt controller

On Sat, May 03, 2025 at 11:18:24PM +0800, Ben Zong-You Xie wrote:
> Add the DT binding documentation for Andes machine-level software
> interrupt controller.
> 
> In the Andes platform such as QiLai SoC, the PLIC module is instantiated a
> second time with all interrupt sources tied to zero as the software
> interrupt controller (PLICSW). PLICSW can generate machine-level software
> interrupts through programming its registers.
> 
> Signed-off-by: Ben Zong-You Xie <ben717@...estech.com>

Acked-by: Conor Dooley <conor.dooley@...rochip.com>

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