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Message-ID: <86a57ohjey.wl-maz@kernel.org>
Date: Wed, 07 May 2025 10:14:29 +0100
From: Marc Zyngier <maz@...nel.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski
 <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Catalin Marinas
 <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Sascha Bischoff
 <sascha.bischoff@....com>,
	Timothy Hayes <timothy.hayes@....com>,
	"Liam R.\
 Howlett" <Liam.Howlett@...cle.com>,
	Mark Rutland <mark.rutland@....com>,
	Jiri Slaby <jirislaby@...nel.org>,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH v3 20/25] irqchip/gic-v5: Add GICv5 PPI support

On Tue, 06 May 2025 16:00:31 +0100,
Thomas Gleixner <tglx@...utronix.de> wrote:
> 
> How does this test distinguish between LEVEL_LOW and LEVEL_HIGH? It only
> tests for level, no? So the test is interesting at best ...

There is no distinction between HIGH and LOW, RISING and FALLING, in
any revision of the GIC architecture.

	M.

-- 
Without deviation from the norm, progress is not possible.

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