linux-kernel - Re: [PATCH RESEND 2/3] arm64: tegra: Configure QSPI clocks and add DMA

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <lvzu2huonk6fm7ce77xej7kiwqtwupvbr7ilpn2yppq2cmtrnb@jw2ohtmicprs>
Date: Thu, 8 May 2025 22:27:51 +0200
From: Thierry Reding <thierry.reding@...il.com>
To: Vishwaroop A <va@...dia.com>
Cc: broonie@...nel.org, robh@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org, jonathanh@...dia.com, skomatineni@...dia.com, 
	ldewangan@...dia.com, kyarlagadda@...dia.com, smangipudi@...dia.com, 
	linux-spi@...r.kernel.org, devicetree@...r.kernel.org, linux-tegra@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND 2/3] arm64: tegra: Configure QSPI clocks and add
 DMA

On Tue, May 06, 2025 at 03:23:49PM +0000, Vishwaroop A wrote:
> For Tegra234 devices, set QSPI0_2X_PM to 199.99 MHz and QSPI0_PM to
> 99.99 MHz using PLLC as the parent clock. These frequencies enable
> Quad IO reads at up to 99.99 MHz, the maximum achievable given PLL
> and clock divider limitations. Introduce IOMMU property which is
> needed for internal dma transfers.
> 
> Signed-off-by: Vishwaroop A <va@...dia.com>
> ---
>  arch/arm64/boot/dts/nvidia/tegra234.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)

I've applied this now. The remaining discussions on the bindings patch
are details about how to deal with IOMMU on older platforms, but this
patch in isolation is just adding standard properties.

Thanks,
Thierry

Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)