linux-kernel - [tip: x86/urgent] x86/sev: Fix operator precedence in GHCB_MSR_VMPL_REQ

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Message-ID: <174695683185.406.15235858727409884425.tip-bot2@tip-bot2>
Date: Sun, 11 May 2025 09:47:11 -0000
From: "tip-bot2 for Seongman Lee" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Seongman Lee <augustus92@...st.ac.kr>,
 "Borislav Petkov (AMD)" <bp@...en8.de>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: x86/urgent] x86/sev: Fix operator precedence in
 GHCB_MSR_VMPL_REQ_LEVEL macro

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     f7387eff4bad33d12719c66c43541c095556ae4e
Gitweb:        https://git.kernel.org/tip/f7387eff4bad33d12719c66c43541c095556ae4e
Author:        Seongman Lee <augustus92@...st.ac.kr>
AuthorDate:    Sun, 11 May 2025 18:23:28 +09:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Sun, 11 May 2025 11:38:03 +02:00

x86/sev: Fix operator precedence in GHCB_MSR_VMPL_REQ_LEVEL macro

The GHCB_MSR_VMPL_REQ_LEVEL macro lacked parentheses around the bitmask
expression, causing the shift operation to bind too early. As a result,
when requesting VMPL1 (e.g., GHCB_MSR_VMPL_REQ_LEVEL(1)), incorrect
values such as 0x000000016 were generated instead of the intended
0x100000016 (the requested VMPL level is specified in GHCBData[39:32]).

Fix the precedence issue by grouping the masked value before applying
the shift.

  [ bp: Massage commit message. ]

Fixes: 34ff65901735 ("x86/sev: Use kernel provided SVSM Calling Areas")
Signed-off-by: Seongman Lee <augustus92@...st.ac.kr>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://lore.kernel.org/20250511092329.12680-1-cloudlee1719@gmail.com
---
 arch/x86/include/asm/sev-common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h
index acb85b9..0020d77 100644
--- a/arch/x86/include/asm/sev-common.h
+++ b/arch/x86/include/asm/sev-common.h
@@ -116,7 +116,7 @@ enum psc_op {
 #define GHCB_MSR_VMPL_REQ		0x016
 #define GHCB_MSR_VMPL_REQ_LEVEL(v)			\
 	/* GHCBData[39:32] */				\
-	(((u64)(v) & GENMASK_ULL(7, 0) << 32) |		\
+	((((u64)(v) & GENMASK_ULL(7, 0)) << 32) |	\
 	/* GHCBDdata[11:0] */				\
 	GHCB_MSR_VMPL_REQ)