linux-kernel - Re: [PATCH v3 15/17] x86/mce/amd: Support SMCA Corrected Error Interrupt

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Message-ID: <20250512153508.GB2355@yaz-khff2.amd.com>
Date: Mon, 12 May 2025 11:35:08 -0400
From: Yazen Ghannam <yazen.ghannam@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: x86@...nel.org, Tony Luck <tony.luck@...el.com>,
	linux-kernel@...r.kernel.org, linux-edac@...r.kernel.org,
	Smita.KoralahalliChannabasappa@....com,
	Qiuxu Zhuo <qiuxu.zhuo@...el.com>
Subject: Re: [PATCH v3 15/17] x86/mce/amd: Support SMCA Corrected Error
 Interrupt

On Fri, May 09, 2025 at 09:37:21PM +0200, Borislav Petkov wrote:
> On Tue, Apr 15, 2025 at 02:55:10PM +0000, Yazen Ghannam wrote:
> > @@ -306,6 +306,11 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
> >  			high |= BIT(5);
> >  		}
> 
> Yeah, the above statements explain in comments what they do so that we don't
> have to define the bits but use them straight "naked" with the BIT macro.
> I think you'd need to put something along the lines of that text...
> 
> > Check for the feature bit in the MCA_CONFIG register and confirm that
> > the MCA thresholding interrupt handler is already enabled. If successful,
> > set the feature enable bit in the MCA_CONFIG register to indicate to the
> > Platform that the OS is ready for the interrupt.
> 
> ... here.
> 
> <---
> 

Okay, will do.

Thanks,
Yazen