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Message-Id: <20250513080151.565359-1-noltari@gmail.com>
Date: Tue, 13 May 2025 10:01:51 +0200
From: Álvaro Fernández Rojas <noltari@...il.com>
To: linux-mtd@...ts.infradead.org,
dregan@...adcom.com,
miquel.raynal@...tlin.com,
bcm-kernel-feedback-list@...adcom.com,
florian.fainelli@...adcom.com,
rafal@...ecki.pl,
computersforpeace@...il.com,
kamal.dasu@...adcom.com,
dan.beygelman@...adcom.com,
william.zhang@...adcom.com,
frieder.schrempf@...tron.de,
linux-kernel@...r.kernel.org,
vigneshr@...com,
richard@....at,
bbrezillon@...nel.org,
kdasu.kdev@...il.com,
jaimeliao.tw@...il.com,
kilobyte@...band.pl,
jonas.gorski@...il.com,
dgcbueu@...il.com
Cc: Álvaro Fernández Rojas <noltari@...il.com>
Subject: [PATCH v2] mtd: rawnand: brcmnand: legacy exec_op implementation
Commit 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation")
removed legacy interface functions, breaking < v5.0 controllers support.
In order to fix older controllers we need to add an alternative exec_op
implementation which doesn't rely on low level registers.
Fixes: 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation")
Signed-off-by: Álvaro Fernández Rojas <noltari@...il.com>
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 160 ++++++++++++++++++++++-
1 file changed, 154 insertions(+), 6 deletions(-)
v2: multiple improvements:
- Use proper native commands for checks.
- Fix NAND_CMD_PARAM/NAND_CMD_RNDOUT addr calculation.
- Remove host->last_addr usage.
- Remove sector_size_1k since it only applies to v5.0+ controllers.
- Remove brcmnand_wp since it doesn't exist for < v5.0 controllers.
- Use j instead of i for flash_cache loop.
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 17f6d9723df9..2b519dfcac5d 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2490,14 +2490,163 @@ static int brcmnand_op_is_reset(const struct nand_operation *op)
return 0;
}
+static int brcmnand_exec_instructions(struct nand_chip *chip,
+ const struct nand_operation *op)
+{
+ struct brcmnand_host *host = nand_get_controller_data(chip);
+ unsigned int i;
+ int ret = 0;
+
+ for (i = 0; i < op->ninstrs; i++) {
+ ret = brcmnand_exec_instr(host, i, op);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+static int brcmnand_exec_instructions_legacy(struct nand_chip *chip,
+ const struct nand_operation *op)
+{
+ struct mtd_info *mtd = nand_to_mtd(chip);
+ struct brcmnand_host *host = nand_get_controller_data(chip);
+ struct brcmnand_controller *ctrl = host->ctrl;
+ const struct nand_op_instr *instr;
+ unsigned int i, j;
+ int cmd = CMD_NULL, last_cmd = CMD_NULL;
+ int ret = 0;
+ u64 last_addr;
+
+ for (i = 0; i < op->ninstrs; i++) {
+ instr = &op->instrs[i];
+
+ if (instr->type == NAND_OP_CMD_INSTR) {
+ if (instr->ctx.cmd.opcode == NAND_CMD_READID) {
+ cmd = CMD_DEVICE_ID_READ;
+ } else if (instr->ctx.cmd.opcode == NAND_CMD_READOOB) {
+ cmd = CMD_SPARE_AREA_READ;
+ } else if (instr->ctx.cmd.opcode == NAND_CMD_ERASE1) {
+ cmd = CMD_BLOCK_ERASE;
+ } else if (instr->ctx.cmd.opcode == NAND_CMD_ERASE2) {
+ cmd = CMD_NULL;
+ } else if (instr->ctx.cmd.opcode == NAND_CMD_PARAM) {
+ cmd = CMD_PARAMETER_READ;
+ } else if (instr->ctx.cmd.opcode == NAND_CMD_RNDOUT) {
+ cmd = CMD_PARAMETER_CHANGE_COL;
+ } else if (instr->ctx.cmd.opcode == NAND_CMD_RNDOUTSTART) {
+ cmd = CMD_NULL;
+ } else {
+ dev_err(ctrl->dev, "unsupported cmd=%d\n",
+ instr->ctx.cmd.opcode);
+ ret = -EOPNOTSUPP;
+ break;
+ }
+ } else if (instr->type == NAND_OP_ADDR_INSTR) {
+ u64 addr = 0;
+
+ if (cmd == CMD_NULL)
+ continue;
+
+ if (instr->ctx.addr.naddrs > 8) {
+ dev_err(ctrl->dev, "unsupported naddrs=%u\n",
+ instr->ctx.addr.naddrs);
+ ret = -EOPNOTSUPP;
+ break;
+ }
+
+ for (j = 0; j < instr->ctx.addr.naddrs; j++)
+ addr |= (instr->ctx.addr.addrs[j]) << (j << 3);
+
+ if (cmd == CMD_PARAMETER_CHANGE_COL)
+ addr &= ~((u64)(FC_BYTES - 1));
+
+ brcmnand_set_cmd_addr(mtd, addr);
+ brcmnand_send_cmd(host, cmd);
+ last_addr = addr;
+ last_cmd = cmd;
+ cmd = CMD_NULL;
+ brcmnand_waitfunc(chip);
+
+ if (last_cmd == CMD_PARAMETER_READ ||
+ last_cmd == CMD_PARAMETER_CHANGE_COL) {
+ /* Copy flash cache word-wise */
+ u32 *flash_cache = (u32 *)ctrl->flash_cache;
+
+ brcmnand_soc_data_bus_prepare(ctrl->soc, true);
+
+ /*
+ * Must cache the FLASH_CACHE now, since changes in
+ * SECTOR_SIZE_1K may invalidate it
+ */
+ for (j = 0; j < FC_WORDS; j++)
+ /*
+ * Flash cache is big endian for parameter pages, at
+ * least on STB SoCs
+ */
+ flash_cache[j] = be32_to_cpu(brcmnand_read_fc(ctrl, j));
+
+ brcmnand_soc_data_bus_unprepare(ctrl->soc, true);
+ }
+ } else if (instr->type == NAND_OP_DATA_IN_INSTR) {
+ u8 *in = instr->ctx.data.buf.in;
+
+ if (last_cmd == CMD_DEVICE_ID_READ) {
+ u32 val;
+
+ if (instr->ctx.data.len > 8) {
+ dev_err(ctrl->dev, "unsupported len=%u\n",
+ instr->ctx.data.len);
+ ret = -EOPNOTSUPP;
+ break;
+ }
+
+ for (j = 0; j < instr->ctx.data.len; j++) {
+ if (j == 0)
+ val = brcmnand_read_reg(ctrl, BRCMNAND_ID);
+ else if (j == 4)
+ val = brcmnand_read_reg(ctrl, BRCMNAND_ID_EXT);
+
+ in[j] = (val >> (24 - ((j % 4) << 3))) & 0xff;
+ }
+ } else if (last_cmd == CMD_SPARE_AREA_READ) {
+ for (j = 0; j < instr->ctx.data.len; j++)
+ in[j] = oob_reg_read(ctrl, j);
+ } else if (last_cmd == CMD_PARAMETER_READ ||
+ last_cmd == CMD_PARAMETER_CHANGE_COL) {
+ u64 addr;
+ u32 offs;
+
+ for (j = 0; j < instr->ctx.data.len; j++) {
+ addr = last_addr + j;
+ offs = addr & (FC_BYTES - 1);
+
+ if (j > 0 && offs == 0)
+ nand_change_read_column_op(chip, addr, NULL, 0,
+ false);
+
+ in[j] = ctrl->flash_cache[offs];
+ }
+ }
+ } else if (instr->type == NAND_OP_WAITRDY_INSTR) {
+ ret = bcmnand_ctrl_poll_status(host, NAND_CTRL_RDY, NAND_CTRL_RDY, 0);
+ } else {
+ dev_err(ctrl->dev, "unsupported instruction type: %d\n", instr->type);
+ ret = -EINVAL;
+ }
+ }
+
+ return ret;
+}
+
static int brcmnand_exec_op(struct nand_chip *chip,
const struct nand_operation *op,
bool check_only)
{
struct brcmnand_host *host = nand_get_controller_data(chip);
+ struct brcmnand_controller *ctrl = host->ctrl;
struct mtd_info *mtd = nand_to_mtd(chip);
u8 *status;
- unsigned int i;
int ret = 0;
if (check_only)
@@ -2525,11 +2674,10 @@ static int brcmnand_exec_op(struct nand_chip *chip,
if (op->deassert_wp)
brcmnand_wp(mtd, 0);
- for (i = 0; i < op->ninstrs; i++) {
- ret = brcmnand_exec_instr(host, i, op);
- if (ret)
- break;
- }
+ if (ctrl->nand_version >= 0x500)
+ brcmnand_exec_instructions(chip, op);
+ else
+ brcmnand_exec_instructions_legacy(chip, op);
if (op->deassert_wp)
brcmnand_wp(mtd, 1);
--
2.39.5
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