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Message-ID: <F36DBE47-2F2E-4B34-9A96-89607EBDBA44@nutanix.com>
Date: Tue, 13 May 2025 02:11:31 +0000
From: Jon Kohler <jon@...anix.com>
To: Sean Christopherson <seanjc@...gle.com>
CC: "pbonzini@...hat.com" <pbonzini@...hat.com>,
"tglx@...utronix.de"
<tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>, "bp@...en8.de"
<bp@...en8.de>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH 13/18] KVM: x86/mmu: Adjust SPTE_MMIO_ALLOWED_MASK to
understand MBEC
> On May 12, 2025, at 3:37 PM, Sean Christopherson <seanjc@...gle.com> wrote:
>
> !-------------------------------------------------------------------|
> CAUTION: External Email
>
> |-------------------------------------------------------------------!
>
> Please be more precise with the shortlogs. "Understand MBEC" is extremely vague.
Ack, thanks for the feedback. I’ll tune it up across the board
>
> On Thu, Mar 13, 2025, Jon Kohler wrote:
>> Adjust the SPTE_MMIO_ALLOWED_MASK and associated values to make these
>> masks aware of PTE Bit 10, to be used by Intel MBEC.
>
> Same thing here. "aware of PTE bit 10" doesn't describe the change in a way that
> allows for quick review of the patch. E.g.
>
> KVM: x86/mmu: Exclude EPT MBEC's user-executable bit from the MMIO generation
>
> The changelogs also need to explain *why*. If you actually tried to write out
> justification for why KVM can't use bit 10 for the MMIO generation, then unless
> you start making stuff up (or Chao and I are missing something), you'll come to
> same conclusion that Chao and I came to: this patch is unnecessary.
I’ll take a swing at it again, IIRC I couldn’t get it working without this, but I’ll page
that back in and figure it out
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