linux-kernel - Re: [PATCH v3 17/17] x86/mce: Restore poll settings after storm subsides

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Message-ID: <20250514143416.GA597208@yaz-khff2.amd.com>
Date: Wed, 14 May 2025 10:34:16 -0400
From: Yazen Ghannam <yazen.ghannam@....com>
To: "Luck, Tony" <tony.luck@...el.com>
Cc: Borislav Petkov <bp@...en8.de>, "x86@...nel.org" <x86@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
	"Smita.KoralahalliChannabasappa@....com" <Smita.KoralahalliChannabasappa@....com>,
	"Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
Subject: Re: [PATCH v3 17/17] x86/mce: Restore poll settings after storm
 subsides

On Tue, May 13, 2025 at 10:07:13PM +0000, Luck, Tony wrote:
> > On AMD, polling and interrupt are independent. We still poll all banks
> > even if they are interrupt-capable. I think we discussed this in a
> > previous revision of this set.
> 
> Can you race and double report the same error if a polling interval
> and interrupt happen together?
> 

Maybe, but probably very unlikely.

On AMD, MCA bank management is always 'local', i.e. per-CPU.

If a CPU is in the polling function, can it be preempted by an interrupt
(not MCE)?

> Disabling polling for interrupt capable banks happened before I
> started looking at this code. But I assumed it was to avoid double
> report.
> 

Ah okay. I assumed it was a performance thing too. But maybe that's just
a nice side effect.

Thanks,
Yazen