linux-kernel - Re: [PATCH 1/2] dt-bindings: iio: adc: Add ROHM BD79100G

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <5c721d80-70e1-4cdc-974d-2007bbddfeb3@gmail.com>
Date: Wed, 14 May 2025 08:36:25 +0300
From: Matti Vaittinen <mazziesaccount@...il.com>
To: Conor Dooley <conor@...nel.org>
Cc: Matti Vaittinen <matti.vaittinen@...rohmeurope.com>,
 Lars-Peter Clausen <lars@...afoo.de>,
 Michael Hennerich <Michael.Hennerich@...log.com>,
 Jonathan Cameron <jic23@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, linux-iio@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: Add ROHM BD79100G

On 13/05/2025 17:39, Conor Dooley wrote:
> On Tue, May 13, 2025 at 11:26:27AM +0300, Matti Vaittinen wrote:
>> The ROHM BD79100G is a 12-bit ADC which can be read over SPI. Device has
>> no MOSI pin. ADC results can be read from MISO by clocking in 16 bits.
>> The 4 leading bits will be zero, last 12 containig the data.
> 
> I think it is probably worth mentioning why a rohm device is going into
> this binding (clone?) and that the 12-bit thing is a differentiator that
> is why you're not using a fallback.

Thanks for mentioning the fallback option Conor! You're a hero :)

Now that you mentioned using a fallback, I believe I can ditch the 
driver changes and make BU79100G to use adc101s as a fallback!

I didn't even consider if some of the existing devices were (from SW 
perspective) identical. I was just happy when I found there was a driver 
supporting these simple SPI ADCs. Then I picked the right macro for 
doing register data conversion and correct shift, dumped in the bit 
width and extended the longish list of devices. I never checked if 
another device in the driver had similar set of "IC specific values".

Yours,
	-- Matti