lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CALT56yPxcsLhA2eigirjvNiWR5JBFW4jsOAi7QWkgmJgbMnKXw@mail.gmail.com>
Date: Thu, 15 May 2025 03:17:48 +0300
From: Dmitry Baryshkov <lumag@...nel.org>
To: Jessica Zhang <jessica.zhang@....qualcomm.com>
Cc: Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>, 
	Marijn Suijten <marijn.suijten@...ainline.org>, David Airlie <airlied@...il.com>, 
	Simona Vetter <simona@...ll.ch>, Abhinav Kumar <quic_abhinavk@...cinc.com>, 
	Abhinav Kumar <abhinav.kumar@....qualcomm.com>, linux-arm-msm@...r.kernel.org, 
	dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/5] drm/msm/dpu: Filter writeback modes using writeback maxlinewidth

On Thu, 15 May 2025 at 02:52, Jessica Zhang
<jessica.zhang@....qualcomm.com> wrote:
>
> Since the max mixer width is not a strict hardware limit, use the actual

Is it? What is the actual max width that the mixer can support?

> hardware limit (the writeback maxlinewidth) to filter modes.
>
> Signed-off-by: Jessica Zhang <jessica.zhang@....qualcomm.com>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 9 +--------
>  1 file changed, 1 insertion(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
> index 8ff496082902..0a198896f656 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
> @@ -14,14 +14,7 @@ static int dpu_wb_conn_get_modes(struct drm_connector *connector)
>         struct msm_drm_private *priv = dev->dev_private;
>         struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
>
> -       /*
> -        * We should ideally be limiting the modes only to the maxlinewidth but
> -        * on some chipsets this will allow even 4k modes to be added which will
> -        * fail the per SSPP bandwidth checks. So, till we have dual-SSPP support
> -        * and source split support added lets limit the modes based on max_mixer_width
> -        * as 4K modes can then be supported.
> -        */
> -       return drm_add_modes_noedid(connector, dpu_kms->catalog->caps->max_mixer_width,
> +       return drm_add_modes_noedid(connector, dpu_kms->catalog->wb->maxlinewidth,
>                         dev->mode_config.max_height);
>  }
>
>
> --
> 2.49.0
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ