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Message-ID: <174726846872.375413.17945727550032496363.b4-ty@kernel.org>
Date: Thu, 15 May 2025 09:21:44 +0900
From: William Breathitt Gray <wbg@...nel.org>
To: lee@...nel.org,
ukleinek@...nel.org,
alexandre.torgue@...s.st.com,
Fabrice Gasnier <fabrice.gasnier@...s.st.com>
Cc: William Breathitt Gray <wbg@...nel.org>,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
jic23@...nel.org,
catalin.marinas@....com,
will@...nel.org,
devicetree@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-iio@...r.kernel.org,
linux-pwm@...r.kernel.org,
olivier.moysan@...s.st.com
Subject: Re: (subset) [PATCH v3 3/8] counter: stm32-timer-cnt: add support for stm32mp25
On Fri, 10 Jan 2025 10:19:17 +0100, Fabrice Gasnier wrote:
> Add support for STM32MP25 SoC. There are new counter modes that may be
> implemented in later. Still, use newly introduced compatible to handle
> this new HW variant and avoid being blocked with existing compatible
> in SoC dtsi file. Modes supported currently still remains compatible.
> New timer 20 has encoder capability, add it to the list.
>
>
> [...]
Applied, thanks!
[3/8] counter: stm32-timer-cnt: add support for stm32mp25
commit: ace2cd11a27231efcb8a116a597edab2eef34957
Best regards,
--
William Breathitt Gray <wbg@...nel.org>
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