linux-kernel - Re: [PATCH v5 1/8] dt-bindings: serial: describe SA8255p

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Message-ID: <df6386a1-5b4e-46d5-a431-6ca136a87980@quicinc.com>
Date: Fri, 16 May 2025 12:06:14 +0530
From: Praveen Talari <quic_ptalari@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
        Greg Kroah-Hartman
	<gregkh@...uxfoundation.org>,
        Jiri Slaby <jirislaby@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-serial@...r.kernel.org>, <devicetree@...r.kernel.org>
CC: <psodagud@...cinc.com>, <djaggi@...cinc.com>, <quic_msavaliy@...cinc.com>,
        <quic_vtanuku@...cinc.com>, <quic_arandive@...cinc.com>,
        <quic_mnaresh@...cinc.com>, <quic_shazhuss@...cinc.com>,
        Nikunj Kela
	<quic_nkela@...cinc.com>
Subject: Re: [PATCH v5 1/8] dt-bindings: serial: describe SA8255p

Hi Krzysztof

Gentle reminder!!

On 5/9/2025 10:02 AM, Praveen Talari wrote:
> Hi Krzysztof,
>
> Thank for you review and valuable inputs.
>
> On 5/8/2025 11:15 AM, Praveen Talari wrote:
>> Hi Krzysztof
>>
>> Thank you for your patience. I consider your inputs as valuable 
>> learning.
>>
>> On 5/6/2025 11:53 PM, Krzysztof Kozlowski wrote:
>>> On 06/05/2025 20:02, Praveen Talari wrote:
>>>> +
>>>> +properties:
>>>> +  compatible:
>>>> +    enum:
>>>> +      - qcom,sa8255p-geni-uart
>>>> +      - qcom,sa8255p-geni-debug-uart
>>>> +
>>>> +  reg:
>>>> +    maxItems: 1
>>>> +
>>>> +  interrupts:
>>>> +    minItems: 1
>>> Nothing changed here, this should be dropped based on previous 
>>> discussion.
>>>
>>> You sent this v5 on 8:02 PM of my time. *THEN* you responded to my
>>> comment at v4 at 8:05 PM. That's the way to waste everyone's time.
>>>
>>> I do not understand why interrupt is optional for a new, complete 
>>> device
>>> description.
>
> To put it simply, because we are using the RX GPIO line as wake up IRQ 
> and not all SE related pins are mapped in the PDC,
>
> there is no specific wake-up pin to define. Therefore, the wake-up IRQ 
> should be considered optional.

I hope this response has addressed your query.

Thanks,

Praveen

>
> Thanks,
>
> Praveen
>
>>
>> On this platform, there is no use case of waking up UART, so we 
>> consider the  wake up IRQ as optional.
>>
>> Thanks,
>>
>> Praveen
>>
>>>
>>> Best regards,
>>> Krzysztof