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Message-ID: <kdahkhurbpls5gtmwqyvmgwk6qnczyekvn4nog5hbze2ev7nk3@rqeiw4qovki2>
Date: Fri, 16 May 2025 14:51:38 +0300
From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To: Jürgen Groß <jgross@...e.com>
Cc: "Kirill A. Shutemov" <kirill@...temov.name>,
Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>,
Jonathan Corbet <corbet@....net>, Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>, Ard Biesheuvel <ardb@...nel.org>,
Jan Kiszka <jan.kiszka@...mens.com>, Kieran Bingham <kbingham@...nel.org>,
Michael Roth <michael.roth@....com>, Rick Edgecombe <rick.p.edgecombe@...el.com>,
Brijesh Singh <brijesh.singh@....com>, Sandipan Das <sandipan.das@....com>,
Tom Lendacky <thomas.lendacky@....com>, linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
linux-efi@...r.kernel.org, linux-mm@...ck.org
Subject: Re: [PATCHv2 3/3] x86/64/mm: Make 5-level paging support
unconditional
On Fri, May 16, 2025 at 02:47:46PM +0300, Kirill A. Shutemov wrote:
> On Fri, May 16, 2025 at 01:29:27PM +0200, Jürgen Groß wrote:
> > On 16.05.25 13:09, Kirill A. Shutemov wrote:
> > > On Fri, May 16, 2025 at 12:42:21PM +0200, Jürgen Groß wrote:
> > > > On 16.05.25 11:15, Kirill A. Shutemov wrote:
> > > > > Both Intel and AMD CPUs support 5-level paging, which is expected to
> > > > > become more widely adopted in the future.
> > > > >
> > > > > Remove CONFIG_X86_5LEVEL and ifdeffery for it to make it more readable.
> > > > >
> > > > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> > > > > Suggested-by: Borislav Petkov <bp@...en8.de>
> > > > > ---
> > > > > Documentation/arch/x86/cpuinfo.rst | 8 +++----
> > > > > .../arch/x86/x86_64/5level-paging.rst | 9 --------
> > > > > arch/x86/Kconfig | 22 +------------------
> > > > > arch/x86/Kconfig.cpufeatures | 4 ----
> > > > > arch/x86/boot/compressed/pgtable_64.c | 11 ++--------
> > > > > arch/x86/boot/header.S | 4 ----
> > > > > arch/x86/boot/startup/map_kernel.c | 5 +----
> > > > > arch/x86/include/asm/page_64.h | 2 --
> > > > > arch/x86/include/asm/page_64_types.h | 7 ------
> > > > > arch/x86/include/asm/pgtable_64_types.h | 18 ---------------
> > > > > arch/x86/kernel/alternative.c | 2 +-
> > > > > arch/x86/kernel/head64.c | 2 --
> > > > > arch/x86/kernel/head_64.S | 2 --
> > > > > arch/x86/mm/init.c | 4 ----
> > > > > arch/x86/mm/pgtable.c | 2 +-
> > > > > drivers/firmware/efi/libstub/x86-5lvl.c | 2 +-
> > > > > 16 files changed, 10 insertions(+), 94 deletions(-)
> > > >
> > > > There are some instances of:
> > > >
> > > > #if CONFIG_PGTABLE_LEVELS >= 5
> > > >
> > > > in 64-bit-only code under arch/x86, which could be simplified, too.
> > > >
> > > > They are still correct, but I wanted to hint at further code removals
> > > > being possible.
> > >
> > > Okay, fair enough. Fixup is below.
> > >
> > > Did I miss anything else?
> >
> > Yes.
> >
> > One more instance in arch/x86/xen/mmu_pv.c,
>
> Ah. Right.
>
> > one in arch/x86/include/asm/paravirt.h,
> > one in arch/x86/include/asm/paravirt_types.h,
> > one in arch/x86/kernel/paravirt.c
>
> Hm. Is paravirt 64-bit only?
Oh. It is PARAVIRT_XXL thingy which is only used by XEN_PV which is 64-bit
only, right?
Do we want to make PARAVIRT_XXL explicitly 64-bit only?
--
Kiryl Shutsemau / Kirill A. Shutemov
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