linux-kernel - Re: [PATCH next 2/2] spi: spi-qpic-snand: add support for 8 bits ECC strength

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Message-ID: <87frh4ej87.fsf@bootlin.com>
Date: Fri, 16 May 2025 16:14:00 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Md Sadre Alam <quic_mdalam@...cinc.com>
Cc: Gabor Juhos <j4g8y7@...il.com>,  Mark Brown <broonie@...nel.org>,
  Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,  Richard
 Weinberger <richard@....at>,  Vignesh Raghavendra <vigneshr@...com>,
  Varadarajan Narayanan <quic_varada@...cinc.com>,  Sricharan Ramabadhran
 <quic_srichara@...cinc.com>,  <linux-spi@...r.kernel.org>,
  <linux-mtd@...ts.infradead.org>,  <linux-arm-msm@...r.kernel.org>,
  <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH next 2/2] spi: spi-qpic-snand: add support for 8 bits
 ECC strength


>>> Interestingly enough, it reports the correct number of bit errors now.
>>> For me it seems, that the hardware reports the number of the corrected
>>> *bytes* instead of the corrected *bits*.
>> I doubt that, nobody counts bytes of errors.
>> You results are surprising. I initially though in favour of a software
>> bug, but then it looks even weirder than that. Alam?
> I have checked with HW team , the QPIC ECC HW engine reports the bit
> error byte wise not bit wise.
>
> e.g
>     Byte0 --> 2-bitflips --> QPIC ECC counts 1 only
>     Byte1 --> 3-bitflips --> QPIC ECC counts 1 only
>     Byte2 --> 1-bitflips --> QPIC ECC counts 1 only
>     Byte3 --> 4-bitflips --> QPIC ECC counts 1 only (in 8-bit ecc)
>     Byte4 --> 6-bitflips --> QPIC ECC counts 1 only (in 8-bit ecc)
>
> Hope this can clearify the things now.

o_O ????

How is that even useful? This basically means UBI will never refresh the
data because we will constantly underestimate the number of bitflips! We
need to know the actual number, this averaging does not make any sense
for Linux. Is there another way to get the raw number of bitflips?

Thanks,
Miquèl