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Message-ID: <aCrim32dGexKJvXl@pie.lan>
Date: Mon, 19 May 2025 07:49:47 +0000
From: Yao Zi <ziyao@...root.org>
To: Binbin Zhou <zhoubb.aaron@...il.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Huacai Chen <chenhuacai@...nel.org>,
WANG Xuerui <kernel@...0n.name>,
Neil Armstrong <neil.armstrong@...aro.org>,
Heiko Stuebner <heiko@...ech.de>, Junhao Xie <bigfoot@...ssfun.cn>,
Rafał Miłecki <rafal@...ecki.pl>,
Aradhya Bhatia <a-bhatia1@...com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Binbin Zhou <zhoubinbin@...ngson.cn>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, loongarch@...ts.linux.dev,
Mingcong Bai <jeffbai@...c.io>, Kexy Biscuit <kexybiscuit@...c.io>
Subject: Re: [PATCH v2 3/4] LoongArch: dts: Add initial SoC devicetree for
Loongson 2K0300
On Mon, May 19, 2025 at 11:10:16AM +0800, Binbin Zhou wrote:
> Hi Yao:
>
> Thanks for your patch.
>
> On Sun, May 18, 2025 at 4:05 PM Yao Zi <ziyao@...root.org> wrote:
> >
> > Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue
> > core and targets embedded market. Only CPU core, legacy interrupt
> > controllers and UARTs are defined for now.
> >
> > Signed-off-by: Yao Zi <ziyao@...root.org>
> > ---
> > arch/loongarch/boot/dts/loongson-2k0300.dtsi | 184 +++++++++++++++++++
> > 1 file changed, 184 insertions(+)
> > create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
> >
> > diff --git a/arch/loongarch/boot/dts/loongson-2k0300.dtsi b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > new file mode 100644
> > index 000000000000..17974f793947
> > --- /dev/null
> > +++ b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > @@ -0,0 +1,184 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2025 Loongson Technology Corporation Limited
> > + * Copyright (C) 2025 Yao Zi <ziyao@...root.org>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +/ {
> > + compatible = "loongson,ls2k0300";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
> > + compatible = "loongson,la264";
> > + reg = <0>;
> > + device_type = "cpu";
> > + clocks = <&cpu_clk>;
> > + };
> > +
> > + };
> > +
> > + cpuintc: interrupt-controller {
> > + compatible = "loongson,cpu-interrupt-controller";
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + };
> > +
> > + cpu_clk: clock-1000m {
> > + compatible = "fixed-clock";
> > + clock-frequency = <1000000000>;
> > + #clock-cells = <0>;
> > + };
> > +
> > + soc {
> I found the following warning while doing dtbs_check, please check again:
>
> DTC [C] arch/loongarch/boot/dts/ls2k0300-ctcisz-forever-pi.dtb
> arch/loongarch/boot/dts/loongson-2k0300.dtsi:41.6-183.4: Warning
> (unit_address_vs_reg): /soc: node has a reg or ranges property, but no
> unit name
Oops, seems -Wunit_address_vs_reg is silent without W=1 specified.
Commit 8654cb8d0371 (dtc: update warning settings for new bus and
node/property name checks, 2017-03-21) shows it's a temporary workaround
("Disable the new dtc warnings by default as there are 1000s").
I'll the node to soc@...00000 in v3. Thanks for catching something I've
never noticed before. Yanteng, is it okay for you to keep your
reviewed-by tag with the change?
> > + compatible = "simple-bus";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
> > + <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
> > + <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
> > +
...
> > 2.49.0
> >
> >
>
> --
> Thanks.
> Binbin
>
Thanks,
Yao Zi
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