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Message-ID: <20250519-amazing-loutish-kudu-af8f47@kuoka>
Date: Mon, 19 May 2025 10:10:34 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Michael Riesch <michael.riesch@...labora.com>
Cc: Mehdi Djait <mehdi.djait@...ux.intel.com>, 
	Maxime Chevallier <maxime.chevallier@...tlin.com>, Théo Lebrun <theo.lebrun@...tlin.com>, 
	Thomas Petazzoni <thomas.petazzoni@...tlin.com>, Gerald Loacker <gerald.loacker@...fvision.net>, 
	Bryan O'Donoghue <bryan.odonoghue@...aro.org>, Markus Elfring <Markus.Elfring@....de>, 
	Laurent Pinchart <laurent.pinchart@...asonboard.com>, Mauro Carvalho Chehab <mchehab@...nel.org>, 
	Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>, 
	Kever Yang <kever.yang@...k-chips.com>, Nicolas Dufresne <nicolas.dufresne@...labora.com>, 
	Sebastian Reichel <sebastian.reichel@...labora.com>, Collabora Kernel Team <kernel@...labora.com>, 
	Paul Kocialkowski <paulk@...-base.io>, Alexander Shiyan <eagle.alexander923@...il.com>, 
	Val Packett <val@...kett.cool>, Rob Herring <robh@...nel.org>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Sakari Ailus <sakari.ailus@...ux.intel.com>, 
	linux-media@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org, 
	Michael Riesch <michael.riesch@...fvision.net>
Subject: Re: [PATCH v7 05/14] media: dt-bindings: add rockchip rk3568 mipi
 csi-2 receiver

On Wed, May 14, 2025 at 05:41:06PM GMT, Michael Riesch wrote:
> +    properties:
> +      port@0:
> +        $ref: /schemas/graph.yaml#/$defs/port-base
> +        unevaluatedProperties: false
> +        description: Input port node. Connect to e.g., a MIPI CSI-2 image sensor.
> +
> +        properties:
> +          endpoint:
> +            $ref: video-interfaces.yaml#
> +            unevaluatedProperties: false
> +
> +            properties:
> +              bus-type:
> +                enum: [1, 4]
> +
> +              data-lanes:
> +                minItems: 1
> +                maxItems: 4
> +
> +            required:
> +              - bus-type
> +              - data-lanes
> +
> +      port@1:
> +        $ref: /schemas/graph.yaml#/properties/port
> +        description: Output port connected to a RK3568 VICAP port.
> +
> +    required:
> +      - port@0
> +      - port@1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - phys
> +  - ports
> +  - power-domains
> +  - resets

If there is going to be a new version, please order this the same as in
properties. Or rather order properties, because this looks alphabetical
and properties do not.

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/rk3568-cru.h>
> +    #include <dt-bindings/power/rk3568-power.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        csi: csi@...b0000 {
> +            compatible = "rockchip,rk3568-mipi-csi";
> +            reg = <0x0 0xfdfb0000 0x0 0x10000>;
> +            clocks = <&cru PCLK_CSI2HOST1>;
> +            phys = <&csi_dphy>;
> +            power-domains = <&power RK3568_PD_VI>;
> +            resets = <&cru SRST_P_CSI2HOST1>;
> +
> +            ports {
> +                #address-cells = <1>;
> +                #size-cells = <0>;
> +
> +                csi_in: port@0 {
> +                    reg = <0>;

Make it complete. Missing endpoint with bus-type and data lanes.


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Best regards,
Krzysztof


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