linux-kernel - Re: [PATCH] arm64: dts: renesas: r9a09g047e57-smarc: Reduce I2C2 clock frequency

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Message-ID: <CAMuHMdX3tmRsWH=T76UESxPO59uG=8di72FuSsV__hHNsmw_CQ@mail.gmail.com>
Date: Mon, 19 May 2025 10:28:30 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: John Madieu <john.madieu.xa@...renesas.com>
Cc: geert+renesas@...der.be, magnus.damm@...il.com, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, biju.das.jz@...renesas.com, 
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: renesas: r9a09g047e57-smarc: Reduce I2C2
 clock frequency

Hi John,

On Mon, 19 May 2025 at 00:08, John Madieu <john.madieu.xa@...renesas.com> wrote:
> Lower the I2C2 bus clock frequency on the RZ/G3E SMARC SoM from 1MHz to 400KHz
> to improve compatibility with a wider range of I2C peripherals. The previous
> 1MHz setting was too aggressive for some devices on the bus, which experienced
> timing issues at such a frequency.
>
> Fixes: f7a98e256ee3 ("arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol")
> Signed-off-by: John Madieu <john.madieu.xa@...renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
> @@ -85,7 +85,7 @@ &gpu {
>  &i2c2 {
>         pinctrl-0 = <&i2c2_pins>;
>         pinctrl-names = "default";
> -       clock-frequency = <1000000>;
> +       clock-frequency = <400000>;
>         status = "okay";
>
>         raa215300: pmic@12 {

Can you please clarify which devices on this bus do not support 1 MHz?
Or perhaps this is a board layout issue?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds