linux-kernel - Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum AC04_CPU

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Message-ID: <aCsOc7VeJTJFk-x6@arm.com>
Date: Mon, 19 May 2025 11:56:51 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: D Scott Phillips <scott@...amperecomputing.com>
Cc: James Clark <james.clark@...aro.org>, James Morse <james.morse@....com>,
	Joey Gouly <joey.gouly@....com>,
	Kevin Brodsky <kevin.brodsky@....com>,
	Marc Zyngier <maz@...nel.org>, Mark Brown <broonie@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Oliver Upton <oliver.upton@...ux.dev>,
	"Rob Herring (Arm)" <robh@...nel.org>,
	Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>,
	Shiqi Liu <shiqiliu@...t.edu.cn>, Will Deacon <will@...nel.org>,
	Yicong Yang <yangyicong@...ilicon.com>, kvmarm@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum
 AC04_CPU_23

On Tue, May 13, 2025 at 11:45:14AM -0700, D Scott Phillips wrote:
> On AmpereOne AC04, updates to HCR_EL2 can rarely corrupt simultaneous
> translations for data addresses initiated by load/store instructions.
> Only instruction initiated translations are vulnerable, not translations
> from prefetches for example. A DSB before the store to HCR_EL2 is
> sufficient to prevent older instructions from hitting the window for
> corruption, and an ISB after is sufficient to prevent younger
> instructions from hitting the window for corruption.
> 
> Signed-off-by: D Scott Phillips <scott@...amperecomputing.com>
> Reviewed-by: Oliver Upton <oliver.upton@...ux.dev>

For the core arm64 bits:

Acked-by: Catalin Marinas <catalin.marinas@....com>

Marc, Will - any preference on how this should go in (kvm or arm64
trees)?