linux-kernel - Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum AC04_CPU

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Message-ID: <20250519111313.GA16690@willie-the-truck>
Date: Mon, 19 May 2025 12:13:17 +0100
From: Will Deacon <will@...nel.org>
To: Catalin Marinas <catalin.marinas@....com>
Cc: D Scott Phillips <scott@...amperecomputing.com>,
	James Clark <james.clark@...aro.org>,
	James Morse <james.morse@....com>, Joey Gouly <joey.gouly@....com>,
	Kevin Brodsky <kevin.brodsky@....com>,
	Marc Zyngier <maz@...nel.org>, Mark Brown <broonie@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Oliver Upton <oliver.upton@...ux.dev>,
	"Rob Herring (Arm)" <robh@...nel.org>,
	Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>,
	Shiqi Liu <shiqiliu@...t.edu.cn>,
	Yicong Yang <yangyicong@...ilicon.com>, kvmarm@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum
 AC04_CPU_23

On Mon, May 19, 2025 at 11:56:51AM +0100, Catalin Marinas wrote:
> On Tue, May 13, 2025 at 11:45:14AM -0700, D Scott Phillips wrote:
> > On AmpereOne AC04, updates to HCR_EL2 can rarely corrupt simultaneous
> > translations for data addresses initiated by load/store instructions.
> > Only instruction initiated translations are vulnerable, not translations
> > from prefetches for example. A DSB before the store to HCR_EL2 is
> > sufficient to prevent older instructions from hitting the window for
> > corruption, and an ISB after is sufficient to prevent younger
> > instructions from hitting the window for corruption.
> > 
> > Signed-off-by: D Scott Phillips <scott@...amperecomputing.com>
> > Reviewed-by: Oliver Upton <oliver.upton@...ux.dev>
> 
> For the core arm64 bits:
> 
> Acked-by: Catalin Marinas <catalin.marinas@....com>
> 
> Marc, Will - any preference on how this should go in (kvm or arm64
> trees)?

I think it makes most sense to go via the kvm tree based on the diffstat.

Cheers,

Will