linux-kernel - Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum AC04_CPU

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Message-Id: <174765584507.3054461.1827773057173102898.b4-ty@kernel.org>
Date: Mon, 19 May 2025 12:57:33 +0100
From: Marc Zyngier <maz@...nel.org>
To: Catalin Marinas <catalin.marinas@....com>,
	James Clark <james.clark@...aro.org>,
	James Morse <james.morse@....com>,
	Joey Gouly <joey.gouly@....com>,
	Kevin Brodsky <kevin.brodsky@....com>,
	Mark Brown <broonie@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Oliver Upton <oliver.upton@...ux.dev>,
	"Rob Herring (Arm)" <robh@...nel.org>,
	Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>,
	Shiqi Liu <shiqiliu@...t.edu.cn>,
	Will Deacon <will@...nel.org>,
	Yicong Yang <yangyicong@...ilicon.com>,
	kvmarm@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	D Scott Phillips <scott@...amperecomputing.com>
Subject: Re: [PATCH v4] arm64: errata: Work around AmpereOne's erratum AC04_CPU_23

On Tue, 13 May 2025 11:45:14 -0700, D Scott Phillips wrote:
> On AmpereOne AC04, updates to HCR_EL2 can rarely corrupt simultaneous
> translations for data addresses initiated by load/store instructions.
> Only instruction initiated translations are vulnerable, not translations
> from prefetches for example. A DSB before the store to HCR_EL2 is
> sufficient to prevent older instructions from hitting the window for
> corruption, and an ISB after is sufficient to prevent younger
> instructions from hitting the window for corruption.
> 
> [...]

Applied to next, thanks!

[1/1] arm64: errata: Work around AmpereOne's erratum AC04_CPU_23
      commit: fed55f49fad181be9dfb93c06efc4ab2b71a72a9

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.