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Message-ID: <25eec2f8-8883-489e-a68b-3f80056bdc76@foss.st.com>
Date: Tue, 20 May 2025 18:29:43 +0200
From: Yann Gautier <yann.gautier@...s.st.com>
To: Rodolfo Giometti <giometti@...eenne.com>, <linux-kernel@...r.kernel.org>
CC: Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue
<alexandre.torgue@...s.st.com>,
Eric Fourmont <eric.fourmont-ext@...com>
Subject: Re: [V1 1/2] arm stm32mp131.dtsi: add "encoding_mode" nvmem
definition
On 5/20/25 10:26, Yann Gautier wrote:
> On 5/19/25 15:08, Rodolfo Giometti wrote:
>> This patch adds the definition for the nvmem location "encoding_mode"
>> related to the "cpu0" node.
>>
>> Signed-off-by: Rodolfo Giometti <giometti@...eenne.com>
>> ---
>> arch/arm/boot/dts/st/stm32mp131.dtsi | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi
>> b/arch/arm/boot/dts/st/stm32mp131.dtsi
>> index e555717c0048..52bf497e26bb 100644
>> --- a/arch/arm/boot/dts/st/stm32mp131.dtsi
>> +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
>> @@ -24,6 +24,9 @@ cpu0: cpu@0 {
>> clocks = <&scmi_perf 0>;
>> clock-names = "cpu";
>> #cooling-cells = <2>;
>> +
>> + nvmem-cells = <&encoding_mode_otp>;
>> + nvmem-cell-names = "encoding_mode";
>> };
>> };
>> @@ -1167,6 +1170,10 @@ part_number_otp: part-number-otp@4 {
>> reg = <0x4 0x2>;
>> bits = <0 12>;
>> };
>> + encoding_mode_otp: encoding-mode-otp@4 {
>
> This node should end with @0 instead of 4.
> It should also be placed before part-number-otp node.
I forgot that this node already was in TF-A, with a different name.
This is better to align it here, the the node would become:
cfg0_otp: cfg0-otp@0 {
reg = <0x0 0x2>;
bits = <0 9>;
};
Best regards,
Yann
>
>> + reg = <0x0 0x1>;
>
> If I'm not mistaken, this should be:
> reg = <0x0 0x2>;
>
>
> Best regards,
> Yann
>
>> + bits = <0 9>;
>> + };
>> vrefint: vrefin-cal@52 {
>> reg = <0x52 0x2>;
>> };
>
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