linux-kernel - Re: [PATCH v13 00/27] x86/resctrl : Support AMD Assignable Bandwidth Monitoring Counters (ABMC)

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Message-ID: <31aec24f-b3df-4a8a-910d-6df175962e84@intel.com>
Date: Wed, 21 May 2025 16:05:05 -0700
From: Reinette Chatre <reinette.chatre@...el.com>
To: Peter Newman <peternewman@...gle.com>
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Subject: Re: [PATCH v13 00/27] x86/resctrl : Support AMD Assignable Bandwidth
 Monitoring Counters (ABMC)

Hi Peter,

On 5/21/25 7:27 AM, Peter Newman wrote:
> On Wed, May 21, 2025 at 1:44 AM Reinette Chatre
> <reinette.chatre@...el.com> wrote:
>> On 5/20/25 4:25 PM, Moger, Babu wrote:

...
>>>
>>> Here’s my current understanding of soft-ABMC. Peter may have a more in-depth perspective on this.
>>>
>>> Soft-ABMC:
>>> a. num_mbm_cntrs: This is a software-defined limit based on the number of active RMIDs that can be supported. The value can be obtained using the code referenced in [4].
>>>
>>> b. Assignments: No hardware configuration is required. We simply need to ensure that no more than num_mbm_cntrs RMIDs are active at any given time.
>>>
>>> c. Configuration: Controlled via /info/L3_MON/mbm_total_bytes_config and mbm_local_bytes_config.
>>>
>>> d. Events: Only two events can be assigned(local and total).
>>>
>>> ABMC:
>>> a. num_mbm_cntrs: This is defined by the hardware.
>>> b. Assignments: Requires special MSR writes to assign counters.
>>> c. Configuration: Comes from /info/L3_MON/counter_configs/.
>>> d. Events: More than two events can be assigned to a group (currently up to 2).
>>>
>>> Commonalities:
>>> a. Assignments can be either exclusive or shared in both these modes.
>>>
>>> Given these, I believe we can easily accommodate soft-ABMC in this interface.
>>
>> This is not so obvious to me. It looks to me as though the user is forced to interpret
>> the content of resctrl files differently based on soft-ABMC vs ABMC making the interface
>> inconsistent and user thus needing to know details of implementations. This is what the previous
>> discussion I linked to aimed to address. It sounds to me as though you believe that this is no longer
>> an issue. Could you please show examples of what a user can expect from the interfaces and how a user
>> will interact with the interfaces on both a non-ABMC and ABMC system?
> 
> At the interface level, I think mbm_L3_assignments on a non-ABMC
> system would only need to contain a single line:
> 
> 0=s;1=s;...;31=s

It should be obvious to user space how to interpret the fields. When there is
thus a single "mbm_cntr_assign" mode used for ABMC and soft-ABMC a single
line like this would be difficult to parse since that would imply/require
that user space knows whether it is running on ABMC or soft-ABMC system,
which we should avoid.

If there are different modes, for example "mbm_cntr_event_assign" and
"mbm_cntr_group_assign" then this could be used by user space to distinguish
how to interact with mbm_L3_assignments making something like this possible.

> 
> But maybe for consistency we would synthesize a single, unmodifiable
> counter configuration to reflect that allocating an RMID in a domain
> results in assignment to all events and deallocating the RMID
> unassigns all events. We could call it "group" to say it's assigning
> at the group level, or perhaps just '*':
> 
> *:0=s;1=s;...;31=s
> 
> I'm not sure about allowing a '*' on ABMC hardware, because it could
> be interpreted as allocating a lot of counters when a large number of
> event configurations exist.
> 
> *:0=s;1=s;...;31=s
> 

Either could work also. Whether it is "group" or "*" ABMC systems could
respond with "not supported". Will think about this more but would
like to hear your opinion about the flexibility that distinguishing between
a "mbm_cntr_event_assign" and "mbm_cntr_group_assign" mode provides.

Reinette

> -Peter
> 
> 
>>
>> Thank you
>>
>> Reinette
>>
>>>
>>>>>>
>>>>>> [2] https://lore.kernel.org/lkml/afb99efe-0de2-f7ad-d0b8-f2a0ea998efd@amd.com/
>>>>>> [3] https://lore.kernel.org/lkml/CALPaoCg3KpF94g2MEmfP_Ro2mQZYFA8sKVkmb+7isotKNgdY9A@mail.gmail.com/
>>>>>
>>>>
>>>>
>>>
>>