[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <55a85622-fe33-4b5f-81b2-4a4270fab680@oss.qualcomm.com>
Date: Thu, 22 May 2025 22:03:18 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Johan Hovold <johan@...nel.org>, Qiang Yu <quic_qianyu@...cinc.com>
Cc: Wenbin Yao <quic_wenbyao@...cinc.com>, catalin.marinas@....com,
will@...nel.org, linux-arm-kernel@...ts.infradead.org,
andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
vkoul@...nel.org, kishon@...nel.org, sfr@...b.auug.org.au,
linux-phy@...ts.infradead.org, krishna.chundru@....qualcomm.com,
quic_vbadigan@...cinc.com, quic_mrana@...cinc.com,
quic_cang@...cinc.com, Johan Hovold <johan+linaro@...nel.org>,
Abel Vesa <abel.vesa@...aro.org>
Subject: Re: [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies
On 5/8/25 11:45 AM, Johan Hovold wrote:
> On Thu, May 08, 2025 at 04:50:30PM +0800, Qiang Yu wrote:
>>
>> On 5/8/2025 4:20 PM, Johan Hovold wrote:
>>> On Thu, May 08, 2025 at 04:15:14PM +0800, Wenbin Yao wrote:
>>>> From: Qiang Yu <quic_qianyu@...cinc.com>
>>>>
>>>> All PCIe PHYs on the X1E80100 SOC require the vdda-qref, which feeds QREF
>>>> clocks provided by the TCSR device.
>>> This still looks wrong and you never replied to why these supplies
>>> shouldn't be handled by the tcsr clock driver that supplies these
>>> clocks:
>>>
>>> https://lore.kernel.org/lkml/aBHUmXx6N72_sCH9@hovoldconsulting.com/
>
>> Sorry, I thought Konrad had convinced you.
>
> IIRC, he just said you guys were told to add the QREF supply to the PHY.
> That's not an argument.
>
>> If the TCSR driver manages these supplies, would it be possible for tscr
>> driver to recognize when it needs to turn vdda-qref on or off for a
>> specific PCIe port?
>
> Sure, just add a lookup table to the driver and enable the required
> supplies when a ref clock is enabled.
>
> As I mentioned in the other thread, the T14s has the following QREF
> supplies:
>
>
> VDD_A_QREFS_1P2_A
> VDD_A_QREFS_1P2_B
>
> VDD_A_QREFS_0P875_A
> VDD_A_QREFS_0P875_B
> VDD_A_QREFS_0P875_0
> VDD_A_QREFS_0P875_2
> VDD_A_QREFS_0P875_3
>
> and it's not clear how these maps to the various consumer ref clocks,
> including the PCIe ones:
>
> #define TCSR_PCIE_2L_4_CLKREF_EN
> #define TCSR_PCIE_2L_5_CLKREF_EN
> #define TCSR_PCIE_8L_CLKREF_EN
> #define TCSR_PCIE_4L_CLKREF_EN
>
> That mapping can be done by the TCSR clock driver (which would also take
> care of the 1.2 V supplies).
So we had an internal discussion about this and while it may work, it
would only do so for some SoCs, and maybe only on the surface, as the
wiring behind it is rather peculiar..
Plus, not all QREF consumers have a clock expressed in TCSR as of
right now.
Konrad
Powered by blists - more mailing lists