linux-kernel - Re: [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <aDRw2rJ39t9W10YG@hovoldconsulting.com>
Date: Mon, 26 May 2025 15:47:06 +0200
From: Johan Hovold <johan@...nel.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Qiang Yu <quic_qianyu@...cinc.com>,
	Wenbin Yao <quic_wenbyao@...cinc.com>, catalin.marinas@....com,
	will@...nel.org, linux-arm-kernel@...ts.infradead.org,
	andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, vkoul@...nel.org, kishon@...nel.org,
	sfr@...b.auug.org.au, linux-phy@...ts.infradead.org,
	krishna.chundru@....qualcomm.com, quic_vbadigan@...cinc.com,
	quic_mrana@...cinc.com, quic_cang@...cinc.com,
	Johan Hovold <johan+linaro@...nel.org>,
	Abel Vesa <abel.vesa@...aro.org>
Subject: Re: [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies

On Thu, May 22, 2025 at 10:03:18PM +0200, Konrad Dybcio wrote:
> On 5/8/25 11:45 AM, Johan Hovold wrote:
> > On Thu, May 08, 2025 at 04:50:30PM +0800, Qiang Yu wrote:
> >> On 5/8/2025 4:20 PM, Johan Hovold wrote:

> >>> This still looks wrong and you never replied to why these supplies
> >>> shouldn't be handled by the tcsr clock driver that supplies these
> >>> clocks:
> >>>
> >>> 	https://lore.kernel.org/lkml/aBHUmXx6N72_sCH9@hovoldconsulting.com/
> > 
> >> Sorry, I thought Konrad had convinced you.
> > 
> > IIRC, he just said you guys were told to add the QREF supply to the PHY.
> > That's not an argument.
> > 
> >> If the TCSR driver manages these supplies, would it be possible for tscr
> >> driver to recognize when it needs to turn vdda-qref on or off for a
> >> specific PCIe port?
> > 
> > Sure, just add a lookup table to the driver and enable the required
> > supplies when a ref clock is enabled.
> > 
> > As I mentioned in the other thread, the T14s has the following QREF
> > supplies:
> > 
> > 	
> > 	VDD_A_QREFS_1P2_A
> > 	VDD_A_QREFS_1P2_B
> > 
> > 	VDD_A_QREFS_0P875_A
> > 	VDD_A_QREFS_0P875_B
> > 	VDD_A_QREFS_0P875_0
> > 	VDD_A_QREFS_0P875_2
> > 	VDD_A_QREFS_0P875_3
> > 
> > and it's not clear how these maps to the various consumer ref clocks,
> > including the PCIe ones:
> > 
> > 	#define TCSR_PCIE_2L_4_CLKREF_EN
> > 	#define TCSR_PCIE_2L_5_CLKREF_EN
> > 	#define TCSR_PCIE_8L_CLKREF_EN
> > 	#define TCSR_PCIE_4L_CLKREF_EN
> > 
> > That mapping can be done by the TCSR clock driver (which would also take
> > care of the 1.2 V supplies).
> 
> So we had an internal discussion about this and while it may work, it
> would only do so for some SoCs, and maybe only on the surface, as the
> wiring behind it is rather peculiar..

Care to expand on why it cannot be made to work generally?

Also, what would the mapping of the above QREF supplies to PCIe PHYs
even look like?

> Plus, not all QREF consumers have a clock expressed in TCSR as of
> right now.

Is that because there is no corresponding bit in the TCSR or simply
because it has not been described yet?

Johan