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Message-ID: <20250528122826.0000566c@huawei.com>
Date: Wed, 28 May 2025 12:28:26 +0100
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>
CC: Marc Zyngier <maz@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, "Rob
 Herring" <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, "Conor
 Dooley" <conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>, Arnd Bergmann <arnd@...db.de>, "Sascha
 Bischoff" <sascha.bischoff@....com>, Timothy Hayes <timothy.hayes@....com>,
	"Liam R. Howlett" <Liam.Howlett@...cle.com>, Mark Rutland
	<mark.rutland@....com>, Jiri Slaby <jirislaby@...nel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<devicetree@...r.kernel.org>
Subject: Re: [PATCH v4 14/26] arm64/sysreg: Add ICH_HFGITR_EL2

On Tue, 13 May 2025 19:48:07 +0200
Lorenzo Pieralisi <lpieralisi@...nel.org> wrote:

> Add ICH_HFGITR_EL2 register description to sysreg.
> 
> Signed-off-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
> Cc: Will Deacon <will@...nel.org>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Marc Zyngier <maz@...nel.org>

Hi Lorenzo,

> ---
>  arch/arm64/tools/sysreg | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 0927754d9fe2c5addbd9693d83b7324f1af66d3e..d2f53fb7929c69895fe8a21ba625d058a844d447 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -3616,6 +3616,21 @@ Res0	1
>  Field	0	ICC_APR_EL1
>  EndSysreg
>  
> +Sysreg	ICH_HFGITR_EL2	3	4	12	9	7
> +Res0	63:11
> +Field	10	GICRCDNMIA
> +Field	9	GICRCDIA
> +Field	8	GICCDDI
> +Field	7	GICCDEOI
> +Field	6	GICCDHM
> +Field	5	GICCRDRCFG

GICCDRCFG in the spec. (you have a bonus R)

Of course the real question was what am I avoiding that made checking these
against the spec feel like a good idea? :)

FWIW with that fixed,
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
for patches 2 to 14.

> +Field	4	GICCDPEND
> +Field	3	GICCDAFF
> +Field	2	GICCDPRI
> +Field	1	GICCDDIS
> +Field	0	GICCDEN
> +EndSysreg
> +
>  Sysreg	ICH_HCR_EL2	3	4	12	11	0
>  Res0	63:32
>  Field	31:27	EOIcount
> 


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