linux-kernel - Re: [PATCH 0/5] Add support for the IPQ5018 Internal GE PHY

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Message-ID: <33114549-39d4-4745-9100-5222c2753a50@lunn.ch>
Date: Wed, 28 May 2025 14:00:21 +0200
From: Andrew Lunn <andrew@...n.ch>
To: George Moussalem <george.moussalem@...look.com>
Cc: "Rob Herring (Arm)" <robh@...nel.org>,
	Florian Fainelli <f.fainelli@...il.com>,
	Russell King <linux@...linux.org.uk>,
	Heiner Kallweit <hkallweit1@...il.com>, devicetree@...r.kernel.org,
	Conor Dooley <conor+dt@...nel.org>,
	Jakub Kicinski <kuba@...nel.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	"David S. Miller" <davem@...emloft.net>, linux-clk@...r.kernel.org,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	Konrad Dybcio <konradybcio@...nel.org>,
	Michael Turquette <mturquette@...libre.com>,
	Paolo Abeni <pabeni@...hat.com>, linux-arm-msm@...r.kernel.org,
	Eric Dumazet <edumazet@...gle.com>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Stephen Boyd <sboyd@...nel.org>
Subject: Re: [PATCH 0/5] Add support for the IPQ5018 Internal GE PHY

> > arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dtb: ethernet-phy@7: clocks: [[7, 36], [7, 37]] is too long
> > 	from schema $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
> > arch/arm64/boot/dts/qcom/ipq5018-tplink-archer-ax55-v1.dtb: ethernet-phy@7: clocks: [[7, 36], [7, 37]] is too long
> > 	from schema $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
> > 
> 
> These pop up as the phy needs to enable 2 clocks (RX and TX) during probe
> which conflicts with the restriction set in ethernet-phy.yaml which says:
> 
>   clocks:
>     maxItems: 1
> 
> Would you like me to add a condition in qca,ar803x.yaml on the compatible
> (PHY ID) to override it and set it to two?
> 
> Likewise on resets, right now we I've got 1 reset (a bitmask that actually
> triggers 4 resets) to conform to the bindings. If, as per ongoing
> discussion, I need to list all resets, it will also conflict with the
> restriction on resets of max 1 item.

You should describe the hardware. If the hardware has more than one
reset or clock, describe them all, and please fixup the binding to
suit.

	Andrew