linux-kernel - Re: [PATCH] mtd: nand: brcmnand: fix mtd corrected bits stat

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Message-ID: <CAOiHx=nzNZiOiBKUVqpTA5S8uY+ZNdPpLpEQGGDN9jP2-4Lj8Q@mail.gmail.com>
Date: Fri, 30 May 2025 10:27:05 +0200
From: Jonas Gorski <jonas.gorski@...il.com>
To: David Regan <dregan@...adcom.com>
Cc: linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org, 
	bcm-kernel-feedback-list@...adcom.com, william.zhang@...adcom.com, 
	anand.gore@...adcom.com, florian.fainelli@...adcom.com, 
	kamal.dasu@...adcom.com, dan.beygelman@...adcom.com, 
	Miquel Raynal <miquel.raynal@...tlin.com>, Álvaro Fernández Rojas <noltari@...il.com>, 
	rafal@...ecki.pl, computersforpeace@...il.com, frieder.schrempf@...tron.de, 
	vigneshr@...com, richard@....at, bbrezillon@...nel.org, kdasu.kdev@...il.com, 
	jaimeliao.tw@...il.com, kilobyte@...band.pl, dgcbueu@...il.com, 
	dregan@...l.com
Subject: Re: [PATCH] mtd: nand: brcmnand: fix mtd corrected bits stat

Hi,

On Fri, May 30, 2025 at 5:48 AM David Regan <dregan@...adcom.com> wrote:
>
> Currently we attempt to get the amount of flipped bits from a hardware
> location which is reset on every subpage. Instead obtain total flipped
> bits stat from hardware accumulator. In addition identify the correct
> maximum subpage corrected bits.
>
> Signed-off-by: David Regan <dregan@...adcom.com>
> Reviewed-by: William Zhang <william.zhang@...adcom.com>
> Reviewed-by: Kamal Dasu <kamal.dasu@...adcom.com>
> ---
>  drivers/mtd/nand/raw/brcmnand/brcmnand.c | 48 ++++++++++++++++++------
>  1 file changed, 37 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> index 62bdda3be92f..43ab4aedda55 100644
> --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> @@ -361,6 +361,7 @@ enum brcmnand_reg {
>         BRCMNAND_CORR_COUNT,
>         BRCMNAND_CORR_EXT_ADDR,
>         BRCMNAND_CORR_ADDR,
> +       BRCMNAND_READ_ERROR_COUNT,
>         BRCMNAND_UNCORR_EXT_ADDR,
>         BRCMNAND_UNCORR_ADDR,
>         BRCMNAND_SEMAPHORE,
> @@ -389,6 +390,7 @@ static const u16 brcmnand_regs_v21[] = {
>         [BRCMNAND_CORR_THRESHOLD_EXT]   =     0,
>         [BRCMNAND_UNCORR_COUNT]         =     0,
>         [BRCMNAND_CORR_COUNT]           =     0,
> +       [BRCMNAND_READ_ERROR_COUNT]     =     0,
>         [BRCMNAND_CORR_EXT_ADDR]        =  0x60,
>         [BRCMNAND_CORR_ADDR]            =  0x64,
>         [BRCMNAND_UNCORR_EXT_ADDR]      =  0x68,
> @@ -419,6 +421,7 @@ static const u16 brcmnand_regs_v33[] = {
>         [BRCMNAND_CORR_THRESHOLD_EXT]   =     0,
>         [BRCMNAND_UNCORR_COUNT]         =     0,
>         [BRCMNAND_CORR_COUNT]           =     0,
> +       [BRCMNAND_READ_ERROR_COUNT]     =     0,
>         [BRCMNAND_CORR_EXT_ADDR]        =  0x70,
>         [BRCMNAND_CORR_ADDR]            =  0x74,
>         [BRCMNAND_UNCORR_EXT_ADDR]      =  0x78,
> @@ -449,6 +452,7 @@ static const u16 brcmnand_regs_v50[] = {
>         [BRCMNAND_CORR_THRESHOLD_EXT]   =     0,
>         [BRCMNAND_UNCORR_COUNT]         =     0,
>         [BRCMNAND_CORR_COUNT]           =     0,
> +       [BRCMNAND_READ_ERROR_COUNT]     =     0,

I see this register in BCM63268's NAND controller at 0x80, which is a
v4.x one, so I'm surprised v5.0 doesn't have it. Or does it not work
there? I don't know if v3.3 also has it or if using this on v4.x would
require a separate brcmnand_regs entry.

Can't really comment on the remaining changes.

Regards,
Jonas