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Message-ID: <1af4a2a5-2d06-4955-8840-ba0d7226d3a6@ti.com>
Date: Tue, 3 Jun 2025 14:52:41 +0530
From: Beleswar Prasad Padhi <b-padhi@...com>
To: Udit Kumar <u-kumar1@...com>, <nm@...com>, <vigneshr@...com>,
<linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>
CC: <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RESEND PATCH] arm64: dts: ti: k3-j784s4-mcu-wakeup: Configure
wkup_uart0 with clock settings
Hi Udit,
On 03/06/25 09:54, Udit Kumar wrote:
> From: Bhavya Kapoor <b-kapoor@...com>
>
> This commit adds the assigned-clocks and assigned-clock-parents
> properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks
> property is set to reference the clock identified by
> "wkup_usart_mcupll_bypass_out0",
Documentation says "WKUP_UART0_FCLK_CLK" for device id 397 and clock id 0...?
https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html
> ensuring the UART operates with the
> correct clock source.
>
> The assigned-clock-parents property specifies "wkup_usart_clksel_out0"
> as the parent clock. This configuration is critical for establishing
> the proper clocking hierarchy, enabling the UART device to function
> reliably across different baud rates.
>
> Signed-off-by: Bhavya Kapoor <b-kapoor@...com>
Do you need to add your Sign off?
Thanks,
Beleswar
> ---
> Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/
>
> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> index 52e2965a3bf5..1146bc5990ea 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi
> @@ -310,6 +310,8 @@ wkup_uart0: serial@...00000 {
> interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&k3_clks 397 0>;
> clock-names = "fclk";
> + assigned-clocks = <&k3_clks 397 0>;
> + assigned-clock-parents = <&k3_clks 397 1>;
> power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
> };
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