linux-kernel - Re: [PATCH] arm64: dts: qcom: qcs615: disable the CTI device of the camera block

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Message-ID: <405f0432-3f07-45be-8511-06235dcd84d0@oss.qualcomm.com>
Date: Tue, 3 Jun 2025 11:17:18 +0800
From: Jie Gan <jie.gan@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Jie Gan <quic_jiegan@...cinc.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc: Tingwei Zhang <quic_tingweiz@...cinc.com>,
        Jinlong Mao <quic_jinlmao@...cinc.com>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: qcs615: disable the CTI device of the
 camera block



On 5/31/2025 7:05 AM, Konrad Dybcio wrote:
> On 5/28/25 5:02 AM, Jie Gan wrote:
>>
>>
>> On 5/27/2025 6:41 PM, Konrad Dybcio wrote:
>>> On 5/27/25 12:32 PM, Jie Gan wrote:
>>>>
>>>>
>>>> On 5/27/2025 6:23 PM, Konrad Dybcio wrote:
>>>>> On 5/27/25 3:52 AM, Jie Gan wrote:
>>>>>> Disable the CTI device of the camera block to prevent potential NoC errors
>>>>>> during AMBA bus device matching.
>>>>>>
>>>>>> The clocks for the Qualcomm Debug Subsystem (QDSS) are managed by aoss_qmp
>>>>>> through a mailbox. However, the camera block resides outside the AP domain,
>>>>>> meaning its QDSS clock cannot be controlled via aoss_qmp.
>>>>>
>>>>> Which clock drives it then?
>>>>
>>>> It's qcom,aoss-qmp.
>>>>
>>>> clk_prepare->qmp_qdss_clk_prepare
>>>> https://elixir.bootlin.com/linux/v6.15-rc7/source/drivers/soc/qcom/qcom_aoss.c#L280
>>>
>>> I'm confused about this part:
>>>
>>>> However, the camera block resides outside the AP domain,
>>>> meaning its QDSS clock cannot be controlled via aoss_qmp.
>>>
>>> Do we need to poke the QMP of another DRV?
>>
>> The AOSS has a clock control register for all QDSS clocks. when we vote the qdss clock, the aoss_qmp driver will send a message to AOSS to enable the clock control register, then the clock control register will enable all QDSS clocks.
>>
>> The QDSS clock is not a single clock source, it is a term that representing all the clock sources utilized by the QDSS.
> 
> What I'm trying to ask is, is there any way we could enable that
> clock from Linux? Can the camera hw turn these on? Maybe we could
> trick it into enabling them?

There is a power issue if we keep the debug clock on with a long time.

We had a discussion with AOP to check if possible to add the debug clock 
of titan to the QDSS clock list, but they need time to evaluate it.

 From Coresight view, what we can do by now is disable it in DT to 
prevent the unexpected NoC error.

Thanks,
Jie

> 
> Konrad