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Message-ID: <3011644.e9J7NaK4W3@workhorse>
Date: Thu, 12 Jun 2025 14:13:00 +0200
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Sandy Huang <hjc@...k-chips.com>,
Heiko Stübner <heiko@...ech.de>,
Andy Yan <andy.yan@...k-chips.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-rockchip@...ts.infradead.org
Cc: kernel@...labora.com, Andy Yan <andyshrk@....com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org,
Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
Subject: Re: [PATCH 0/3] arm64: dts: rockchip: Fix HDMI output on RK3576
On Wednesday, 11 June 2025 23:47:46 Central European Summer Time Cristian Ciocaltea wrote:
> Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS
> char rate via phy_configure_opts_hdmi"), the workaround of passing the
> PHY rate from DW HDMI QP bridge driver via phy_set_bus_width() became
> partially broken, unless the rate adjustment is done as with RK3588,
> i.e. by CCF from VOP2.
>
> Attempting to fix this up at PHY level would not only introduce
> additional hacks, but it would also fail to adequately resolve the
> display issues that are a consequence of the system CRU limitations.
>
> Therefore, let's proceed with the solution already implemented for
> RK3588, that is to make use of the HDMI PHY PLL as a more accurate DCLK
> source in VOP2.
>
> It's worth noting a follow-up patch is going to drop the hack from the
> bridge driver altogether, while switching to HDMI PHY configuration API
> for setting up the TMDS character rate.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
> ---
> Cristian Ciocaltea (3):
> dt-bindings: display: vop2: Add optional PLL clock property for rk3576
> arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576
> arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576
>
> .../bindings/display/rockchip/rockchip-vop2.yaml | 56 +++++++++++++++++-----
> arch/arm64/boot/dts/rockchip/rk3576.dtsi | 7 ++-
> 2 files changed, 49 insertions(+), 14 deletions(-)
> ---
> base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494
> change-id: 20250611-rk3576-hdmitx-fix-e030fbdb0d17
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>
For the whole series:
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
This fixes HDMI output for 4K resolutions on my RK3576 ArmSoM Sige5.
The DTB checks and bindings checks pass as well.
Kind regards,
Nicolas Frattaroli
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