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Message-ID: <20250613115459.6293f929@pumpkin>
Date: Fri, 13 Jun 2025 11:54:59 +0100
From: David Laight <david.laight.linux@...il.com>
To: Radim Krčmář <rkrcmar@...tanamicro.com>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, Paul
Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, Atish
Patra <atishp@...osinc.com>, Andrew Jones <ajones@...tanamicro.com>,
Clément Léger <cleger@...osinc.com>, Anup Patel
<apatel@...tanamicro.com>
Subject: Re: [PATCH 2/2] RISC-V: make use of variadic sbi_ecall
On Thu, 12 Jun 2025 16:57:55 +0200
Radim Krčmář <rkrcmar@...tanamicro.com> wrote:
> The new sbi_ecall doesn't have to list all 8 arguments anymore, so only
> pass the actual numbers of arguments for each SBI function.
>
> Trailing 0 is sometimes intentional.
...
> @@ -630,10 +630,10 @@ static int pmu_sbi_snapshot_setup(struct riscv_pmu *pmu, int cpu)
> if (IS_ENABLED(CONFIG_32BIT))
> ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_SNAPSHOT_SET_SHMEM,
> cpu_hw_evt->snapshot_addr_phys,
> - (u64)(cpu_hw_evt->snapshot_addr_phys) >> 32, 0, 0, 0, 0);
> + (u64)(cpu_hw_evt->snapshot_addr_phys) >> 32);
That doesn't look right (and other similar ones).
The values are still 64bit - so get passed as two 32bit values (in some way)
so that varargs code will get the wrong values.
I guess the previous change wasn't tested on 32bit?
David
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