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Message-Id: <20250614-apr_14_for_sending-v4-0-8e3945c819cd@samsung.com>
Date: Sat, 14 Jun 2025 20:06:06 +0200
From: Michal Wilczynski <m.wilczynski@...sung.com>
To: Drew Fustini <drew@...7.com>, Guo Ren <guoren@...nel.org>, Fu Wei
<wefu@...hat.com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Michal
Wilczynski <m.wilczynski@...sung.com>, Bartosz Golaszewski <brgl@...ev.pl>,
Philipp Zabel <p.zabel@...gutronix.de>, Frank Binns
<frank.binns@...tec.com>, Matt Coster <matt.coster@...tec.com>, Maarten
Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard
<mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, David Airlie
<airlied@...il.com>, Simona Vetter <simona@...ll.ch>, Paul Walmsley
<paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou
<aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, Ulf Hansson
<ulf.hansson@...aro.org>, Marek Szyprowski <m.szyprowski@...sung.com>
Cc: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org>
Subject: [PATCH v4 0/8] Add TH1520 GPU support with power sequencing
This patch series introduces support for the Imagination IMG BXM-4-64
GPU found on the T-HEAD TH1520 SoC. A key aspect of this support is
managing the GPU's complex power-up and power-down sequence, which
involves multiple clocks and resets.
The TH1520 GPU requires a specific sequence to be followed for its
clocks and resets to ensure correct operation. Initial discussions and
an earlier version of this series explored managing this via the generic
power domain (genpd) framework. However, following further discussions
with kernel maintainers [1], the approach has been reworked to utilize
the dedicated power sequencing (pwrseq) framework.
This revised series now employs a new pwrseq provider driver
(pwrseq-thead-gpu.c) specifically for the TH1520 GPU. This driver
encapsulates the SoC specific power sequence details. The Imagination
GPU driver (pvr_device.c) is updated to act as a consumer of this power
sequencer, requesting the "gpu-power" target. The sequencer driver,
during its match phase with the GPU device, acquires the necessary clock
and reset handles from the GPU device node to perform the full sequence.
This approach aligns with the goal of abstracting SoC specific power
management details away from generic device drivers and leverages the
pwrseq framework as recommended.
The series is structured as follows:
Patch 1: Introduces the pwrseq-thead-gpu auxiliary driver to manage the
GPU's power-on/off sequence.
Patch 2: Adds device tree bindings for the gpu-clkgen reset to the
existing thead,th1520-aon binding.
Patch 3: Extends the pm-domains driver to detect the gpu-clkgen reset
and spawn the pwrseq-thead-gpu auxiliary driver.
Patch 4: Updates the Imagination DRM driver to utilize the pwrseq
framework for TH1520 GPU power management.
Patch 5: Adds the thead,th1520-gpu compatible string to the PowerVR GPU
device tree bindings.
Patch 6: Adds the gpu-clkgen reset property to the aon node in the
TH1520 device tree source.
Patch 7: Adds the device tree node for the IMG BXM-4-64 GPU and its
required fixed-clock.
Patch 8: Enables compilation of the Imagination PowerVR driver on the
RISC-V architecture.
This patchset finishes the work started in bigger series [2] by adding
all remaining GPU power sequencing piece. After this patchset the GPU
probes correctly.
This series supersedes the previous genpd based approach. Testing on
T-HEAD TH1520 SoC indicates the new pwrseq based solution works
correctly.
An open point in Patch 7/8 concerns the GPU memory clock (gpu_mem_clk),
defined as a fixed-clock. The specific hardware frequency for this clock
on the TH1520 could not be determined from available public
documentation. Consequently, clock-frequency = <0>; has been used as a
placeholder to enable driver functionality.
Link to v3 of this series - [3].
v4:
- the pwrseq driver is now an auxiliary driver with a robust match
function based on the power-domains property, spawned from the AON
node
- Imagination DRM driver now uses of_device_id match data to
conditionally probe for the pwrseq, solving the cross platform
probe deferral issue
- add Reviewed-by from Ulf for the entire series
v3:
- re-worked cover letter completely
- complete architectural rework from using extended genpd callbacks to a
dedicated pwrseq provider driver
- introduced pwrseq-thead-gpu.c and associated DT bindings
(thead,th1520-gpu-pwrseq)
- the Imagination driver now calls devm_pwrseq_get() and uses
pwrseq_power_on() / pwrseq_power_off() for the TH1520 GPU
- removed the platform_resources_managed flag from dev_pm_info and
associated logic
- the new pwrseq driver's match() function now acquires consumer-specific
resources (GPU clocks, GPU core reset) directly from the consumer device
v2:
Extended the series by adding two new commits:
- introduced a new platform_resources_managed flag in dev_pm_info along
with helper functions, allowing drivers to detect when clocks and resets
are managed by the platform
- updated the DRM Imagination driver to skip claiming clocks when
platform_resources_managed is set
Split the original bindings update:
- the AON firmware bindings now only add the GPU clkgen reset (the GPU
core reset remains handled by the GPU node)
Reworked the TH1520 PM domain driver to:
- acquire GPU clocks and reset dynamically using attach_dev/detach_dev
callbacks
- handle clkgen reset internally, while GPU core reset is obtained from
the consumer device node
- added a check to enforce that only a single device can be attached to
the GPU PM domain
[1] - https://lore.kernel.org/all/CAPDyKFpi6_CD++a9sbGBvJCuBSQS6YcpNttkRQhQMTWy1yyrRg@mail.gmail.com/
[2] - https://lore.kernel.org/all/20250219140239.1378758-1-m.wilczynski@samsung.com/
[3] - https://lore.kernel.org/all/20250530-apr_14_for_sending-v3-0-83d5744d997c@samsung.com/
---
Michal Wilczynski (8):
power: sequencing: Add T-HEAD TH1520 GPU power sequencer driver
dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen
pmdomain: thead: Instantiate GPU power sequencer via auxiliary bus
drm/imagination: Use pwrseq for TH1520 GPU power management
dt-bindings: gpu: img,powervr-rogue: Add TH1520 GPU compatible
riscv: dts: thead: th1520: Add GPU clkgen reset to AON node
riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node
drm/imagination: Enable PowerVR driver for RISC-V
.../bindings/firmware/thead,th1520-aon.yaml | 7 +
.../devicetree/bindings/gpu/img,powervr-rogue.yaml | 9 +-
MAINTAINERS | 1 +
arch/riscv/boot/dts/thead/th1520.dtsi | 25 +++
drivers/gpu/drm/imagination/Kconfig | 3 +-
drivers/gpu/drm/imagination/pvr_device.c | 31 ++-
drivers/gpu/drm/imagination/pvr_device.h | 17 ++
drivers/gpu/drm/imagination/pvr_drv.c | 6 +
drivers/gpu/drm/imagination/pvr_power.c | 82 +++++---
drivers/pmdomain/thead/Kconfig | 1 +
drivers/pmdomain/thead/th1520-pm-domains.c | 53 ++++++
drivers/power/sequencing/Kconfig | 8 +
drivers/power/sequencing/Makefile | 1 +
drivers/power/sequencing/pwrseq-thead-gpu.c | 208 +++++++++++++++++++++
14 files changed, 417 insertions(+), 35 deletions(-)
---
base-commit: 4774cfe3543abb8ee98089f535e28ebfd45b975a
change-id: 20250414-apr_14_for_sending-5b3917817acc
Best regards,
--
Michal Wilczynski <m.wilczynski@...sung.com>
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