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Message-ID: <aFG2Lsc4AhVBZ7Jm@e129823.arm.com>
Date: Tue, 17 Jun 2025 19:38:38 +0100
From: Yeoreum Yun <yeoreum.yun@....com>
To: Marc Zyngier <maz@...nel.org>
Cc: catalin.marinas@....com, pcc@...gle.com, will@...nel.org,
	broonie@...nel.org, anshuman.khandual@....com, joey.gouly@....com,
	yury.khrustalev@....com, oliver.upton@...ux.dev,
	frederic@...nel.org, akpm@...ux-foundation.org, surenb@...gle.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-doc@...r.kernel.org
Subject: Re: [PATCH v7 1/9] arm64/cpufeature: add FEAT_MTE_TAGGED_FAR feature

Hi Marc,

> On Wed, 11 Jun 2025 14:58:10 +0100,
> Yeoreum Yun <yeoreum.yun@....com> wrote:
> >
> > Add FEAT_MTE_TAGGED_FAR cpucap which makes FAR_ELx report
> > all non-address bits on a synchronous MTE tag check fault since Armv8.9
> >
> > Signed-off-by: Yeoreum Yun <yeoreum.yun@....com>
> > Acked-by: Yury Khrustalev <yury.khrustalev@....com>
> > ---
> >  arch/arm64/kernel/cpufeature.c | 8 ++++++++
> >  arch/arm64/tools/cpucaps       | 1 +
> >  2 files changed, 9 insertions(+)
> >
> > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > index b34044e20128..af6a6924a3e8 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -320,6 +320,7 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = {
> >
> >  static const struct arm64_ftr_bits ftr_id_aa64pfr2[] = {
> >  	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_FPMR_SHIFT, 4, 0),
> > +	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_MTEFAR_SHIFT, 4, ID_AA64PFR2_EL1_MTEFAR_NI),
> >  	ARM64_FTR_END,
> >  };
>
> Same thing as the remark I had on FEAT_LSUI: for anything that does
> not introduce extra state, please similarly enable the feature in KVM.
> There is no point in these discrepancies.
>
> For anything that has extra state, you should at least consider what
> needs to be done.
>
> Thanks,

Okay. I'll expose this to guest.
Thanks.

--
Sincerely,
Yeoreum Yun

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