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Message-Id: <20250618-b4-sm8750-display-v7-0-a591c609743d@linaro.org>
Date: Wed, 18 Jun 2025 16:32:29 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Abhinav Kumar <quic_abhinavk@...cinc.com>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Krishna Manikandan <quic_mkrishn@...cinc.com>,
Jonathan Marek <jonathan@...ek.ca>, Kuogee Hsieh <quic_khsieh@...cinc.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Dmitry Baryshkov <lumag@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Clark <robin.clark@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-clk@...r.kernel.org, Abel Vesa <abel.vesa@...aro.org>,
Srinivas Kandagatla <srini@...nel.org>,
Rob Clark <robin.clark@....qualcomm.com>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Dmitry Baryshkov <lumag@...nel.org>
Subject: [PATCH v7 00/13] drm/msm: Add support for SM8750
Hi,
Dependency / Rabased on top of
==============================
https://lore.kernel.org/r/20250522-dpu-drop-features-v5-0-3b2085a07884@oss.qualcomm.com/
Changes in v7:
=============
- Add ack/rb tags
- Drop unrelated DSI enablement as requested by Dmitry:
https://lore.kernel.org/all/fa8d4af9-e822-4dec-a8dc-f3bbf5dd0100@oss.qualcomm.com/
These will be sent in separate patchset.
Such split allows to have SM8750 patchset fully reviewed, without
continuous requests of doing some more fixes in DSI PHY drivers
(related and unrelated like 10nm).
- Link to v6: https://lore.kernel.org/r/20250610-b4-sm8750-display-v6-0-ee633e3ddbff@linaro.org
Changes in v6:
=============
- Add ack/rb tags
- Dropped dispcc-sm8750 patch, because I sent it separately.
- Several changes due to rebasing on updagted Dmitry's "dpu drop
features" rework.
- Drop applied patches.
- New patch: drm/msm/dpu: Consistently use u32 instead of uint32_t
- Fix dimmed display issue (thanks Abel Vesa) in patch "Implement 10-bit
color alpha for v12.0 DPU".
- Implement remaining comments from Dmitry like code style (blank line),
see also individual changelogs.
- Link to v5: https://lore.kernel.org/r/20250430-b4-sm8750-display-v5-0-8cab30c3e4df@linaro.org
Changes in v5:
=============
- Add ack/rb tags
- New patches:
#6: clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks
#14: drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL
#15: drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields
#16: drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared
#17: drm/msm/dsi/phy: Fix missing initial VCO rate
- Patch drm/msm/dsi: Add support for SM8750:
- Only reparent byte and pixel clocks while PLLs is prepared. Setting
rate works fine with earlier DISP CC patch for enabling their parents
during rate change.
- Link to v4: https://lore.kernel.org/r/20250311-b4-sm8750-display-v4-0-da6b3e959c76@linaro.org
Changes in v4
=============
- Add ack/rb tags
- Implement Dmitry's feedback (lower-case hex, indentation, pass
mdss_ver instead of ctl), patches:
drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU
drm/msm/dpu: Implement CTL_PIPE_ACTIVE for v12.0 DPU
- Rebase on latest next
- Drop applied two first patches
- Link to v3: https://lore.kernel.org/r/20250221-b4-sm8750-display-v3-0-3ea95b1630ea@linaro.org
Changes in v3
=============
- Add ack/rb tags
- #5: dt-bindings: display/msm: dp-controller: Add SM8750:
Extend commit msg
- #7: dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750:
- Properly described interconnects
- Use only one compatible and contains for the sub-blocks (Rob)
- #12: drm/msm/dsi: Add support for SM8750:
Drop 'struct msm_dsi_config sm8750_dsi_cfg' and use sm8650 one.
- drm/msm/dpu: Implement new v12.0 DPU differences
Split into several patches
- Link to v2: https://lore.kernel.org/r/20250217-b4-sm8750-display-v2-0-d201dcdda6a4@linaro.org
Changes in v2
=============
- Implement LM crossbar, 10-bit alpha and active layer changes:
New patch: drm/msm/dpu: Implement new v12.0 DPU differences
- New patch: drm/msm/dpu: Add missing "fetch" name to set_active_pipes()
- Add CDM
- Split some DPU patch pieces into separate patches:
drm/msm/dpu: Drop useless comments
drm/msm/dpu: Add LM_7, DSC_[67], PP_[67] and MERGE_3D_5
drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask
- Split DSI and DSI PHY patches
- Mention CLK_OPS_PARENT_ENABLE in DSI commit
- Mention DSI PHY PLL work:
https://patchwork.freedesktop.org/patch/542000/?series=119177&rev=1
- DPU: Drop SSPP_VIG4 comments
- DPU: Add CDM
- Link to v1: https://lore.kernel.org/r/20250109-b4-sm8750-display-v1-0-b3f15faf4c97@linaro.org
Best regards,
Krzysztof
---
Krzysztof Kozlowski (13):
dt-bindings: display/msm: dsi-phy-7nm: Add SM8750
dt-bindings: display/msm: dsi-controller-main: Add SM8750
dt-bindings: display/msm: dp-controller: Add SM8750
dt-bindings: display/msm: qcom,sm8650-dpu: Add SM8750
dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750
drm/msm/dsi/phy: Add support for SM8750
drm/msm/dsi: Add support for SM8750
drm/msm/dpu: Add support for SM8750
drm/msm/dpu: Consistently use u32 instead of uint32_t
drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU
drm/msm/dpu: Implement CTL_PIPE_ACTIVE for v12.0 DPU
drm/msm/dpu: Implement LM crossbar for v12.0 DPU
drm/msm/mdss: Add support for SM8750
.../bindings/display/msm/dp-controller.yaml | 4 +
.../bindings/display/msm/dsi-controller-main.yaml | 54 ++-
.../bindings/display/msm/dsi-phy-7nm.yaml | 1 +
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 1 +
.../bindings/display/msm/qcom,sm8750-mdss.yaml | 470 ++++++++++++++++++++
.../drm/msm/disp/dpu1/catalog/dpu_12_0_sm8750.h | 494 +++++++++++++++++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 57 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 9 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 29 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 56 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 17 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 210 ++++++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 18 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
drivers/gpu/drm/msm/dsi/dsi.h | 2 +
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 14 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 61 +++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 79 +++-
drivers/gpu/drm/msm/msm_mdss.c | 33 ++
drivers/gpu/drm/msm/msm_mdss.h | 1 +
.../gpu/drm/msm/registers/display/dsi_phy_7nm.xml | 14 +
25 files changed, 1600 insertions(+), 30 deletions(-)
---
base-commit: 9a3b1b1b837c4085ada0e47dc46b399ea4eb80f0
change-id: 20250109-b4-sm8750-display-6ea537754af1
prerequisite-change-id: 20241213-dpu-drop-features-7603dc3ee189:v5
prerequisite-patch-id: 09ea9d7e22f5bc9ff3a4cd7e78be26c5dd154798
prerequisite-patch-id: 42012ab2eb0a46b5d3818e1b59af93c22020138d
prerequisite-patch-id: 361f60c8b2eb46b794d64d1eee9ac21644ded7c2
prerequisite-patch-id: cb6a74cf415236caf49ac6f7fd40bbfcb0bd6778
prerequisite-patch-id: f412cbfc9f6a50738e9d13493a1b3775f9a91942
prerequisite-patch-id: ceeb81f111e4dcb4c1fed5b26a3db274272ae59d
prerequisite-patch-id: d28630601cb7fb106decaab036b6ab400d5e6b6b
prerequisite-patch-id: 9b6ef3a2d66ab25c0dc0c9e68406ea4d948d2920
prerequisite-patch-id: 346d20e7cb51fe60058414bc8227a3d49a20806e
prerequisite-patch-id: 8cfd3ed00998e7713d065b875abeaee40bb1de46
prerequisite-patch-id: 5bd409601455e655eb253c97e8a45ebdf0351871
prerequisite-patch-id: a116df9db7a38831b4d99908753f5e747aa86be5
prerequisite-patch-id: 0e74b407b739f91d338ee328a7bd406cbd1b7d86
prerequisite-patch-id: 2a4739ced79df9818b8d6fd14f7c37b63524ec00
prerequisite-patch-id: 24c19cc08357986131b70f93f597bb0406e19c3a
prerequisite-patch-id: 35143dd7831bbcb3ef78492342683800aaae3f7a
prerequisite-patch-id: 2b292dabe10b76a444e9c2588422b6b54f9f7dbb
prerequisite-patch-id: ba31ff07e7f114a5e3b40fd9ea80b1005e481529
prerequisite-patch-id: 5fa3ca0d70d1efffa702278b6880520e44afa982
prerequisite-patch-id: ca74335a125aee670fe733df32e4960c9e82a302
prerequisite-patch-id: d2f4fd210e5ef44f26939548df78017950fdbf97
prerequisite-patch-id: 47381cd6f4e2044a9a66525c46c4cdcdabcbf9a2
prerequisite-patch-id: bf483037378a25ecdc8d2d1601a61d9fa3f6903f
prerequisite-patch-id: 0d4d741ae44545698e0dbc7add62ef52820021d2
prerequisite-patch-id: 0de4d879d932dc35e5fa50439e6126e3ea560929
prerequisite-patch-id: 73201d8fe16f7c701b9fa9485e0c362ac49b4abf
prerequisite-patch-id: 429a252eeb9a0cfa1881e89bf092d32105246ce4
prerequisite-patch-id: 6e38493372299cfb94a82f060cff0fba3ec45047
prerequisite-patch-id: 7ca84aededdfd010139aca6ce4053990255a24bc
prerequisite-patch-id: 2150afe0ffe671a1c608c36c9f7a8374727167f2
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
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