lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID:
 <ZQ2PR01MB13077459D994A40701B14725E6722@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn>
Date: Wed, 18 Jun 2025 03:24:28 +0000
From: Hal Feng <hal.feng@...rfivetech.com>
To: Bartosz Golaszewski <brgl@...ev.pl>, Emil Renner Berthing
	<kernel@...il.dk>, Jianlong Huang <jianlong.huang@...rfivetech.com>, Linus
 Walleij <linus.walleij@...aro.org>
CC: "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Bartosz
 Golaszewski <bartosz.golaszewski@...aro.org>
Subject: RE: [PATCH 2/2] pinctrl: starfive: jh7110: use new GPIO line value
 setter callbacks

> On 11.06.25 14:14, Bartosz Golaszewski wrote:
> 
> struct gpio_chip now has callbacks for setting line values that return an integer,
> allowing to indicate failures. Convert the driver to using them.
> 
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>

Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>

> ---
>  drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
> b/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
> index
> 1d0d6c224c104e7e970d5e31e52b2fe3b19e2cad..082bb1c6cea9b29257b1
> 97f065c1a9deebc997fd 100644
> --- a/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
> +++ b/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
> @@ -608,8 +608,7 @@ static int jh7110_gpio_get(struct gpio_chip *gc,
> unsigned int gpio)
>  	return !!(readl_relaxed(reg) & BIT(gpio % 32));  }
> 
> -static void jh7110_gpio_set(struct gpio_chip *gc,
> -			    unsigned int gpio, int value)
> +static int jh7110_gpio_set(struct gpio_chip *gc, unsigned int gpio, int
> +value)
>  {
>  	struct jh7110_pinctrl *sfp = container_of(gc,
>  			struct jh7110_pinctrl, gc);
> @@ -625,6 +624,8 @@ static void jh7110_gpio_set(struct gpio_chip *gc,
>  	dout |= readl_relaxed(reg_dout) & ~mask;
>  	writel_relaxed(dout, reg_dout);
>  	raw_spin_unlock_irqrestore(&sfp->lock, flags);
> +
> +	return 0;
>  }
> 
>  static int jh7110_gpio_set_config(struct gpio_chip *gc, @@ -934,7 +935,7
> @@ int jh7110_pinctrl_probe(struct platform_device *pdev)
>  	sfp->gc.direction_input = jh7110_gpio_direction_input;
>  	sfp->gc.direction_output = jh7110_gpio_direction_output;
>  	sfp->gc.get = jh7110_gpio_get;
> -	sfp->gc.set = jh7110_gpio_set;
> +	sfp->gc.set_rv = jh7110_gpio_set;
>  	sfp->gc.set_config = jh7110_gpio_set_config;
>  	sfp->gc.add_pin_ranges = jh7110_gpio_add_pin_ranges;
>  	sfp->gc.base = info->gc_base;
> 
> --
> 2.48.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ