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Message-ID: <aFLrz19yA/EcF9jZ@lizhi-Precision-Tower-5810>
Date: Wed, 18 Jun 2025 12:39:43 -0400
From: Frank Li <Frank.li@....com>
To: Richard Zhu <hongxing.zhu@....com>
Cc: l.stach@...gutronix.de, lpieralisi@...nel.org, kwilczynski@...nel.org,
mani@...nel.org, robh@...nel.org, bhelgaas@...gle.com,
shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
festevam@...il.com, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 1/2] dt-binding: pci-imx6: Add external reference
clock mode support
On Wed, Jun 18, 2025 at 03:48:47PM +0800, Richard Zhu wrote:
> On i.MX, the PCIe reference clock might come from either internal
> system PLL or external clock source.
> Add the external reference clock source for reference clock.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index ca5f2970f217..4b99fa8e7a25 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -219,7 +219,12 @@ allOf:
> - const: pcie_bus
> - const: pcie_phy
> - const: pcie_aux
> - - const: ref
> + - description: PCIe reference clock.
> + oneOf:
> + - description: The controller might be configured clocking
> + coming in from either an internal system PLL or an
> + external clock source.
start from new line
description:
The controller's reference clock can come from one of two clock sources,
internal system PLL or external OSC clock source.
> + enum: [ref, gio]
gio? maybe 'ext' is better.
Suggest use b4 to avoid missed device tree mail list
Frank
>
> unevaluatedProperties: false
>
> --
> 2.37.1
>
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