linux-kernel - RE: [PATCH 1/2] x86/mce: Fix missing address mask in recovery for errors in TDX/SEAM non-root mode

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Message-ID: <SJ1PR11MB60831B85840BD194CBFA6CBFFC72A@SJ1PR11MB6083.namprd11.prod.outlook.com>
Date: Wed, 18 Jun 2025 23:39:10 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: "Huang, Kai" <kai.huang@...el.com>, "pbonzini@...hat.com"
	<pbonzini@...hat.com>, "Hunter, Adrian" <adrian.hunter@...el.com>,
	"seanjc@...gle.com" <seanjc@...gle.com>
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	"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
	"tony.lindgren@...ux.intel.com" <tony.lindgren@...ux.intel.com>,
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 Vishal" <vannapurve@...gle.com>, "Edgecombe, Rick P"
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Subject: RE: [PATCH 1/2] x86/mce: Fix missing address mask in recovery for
 errors in TDX/SEAM non-root mode

> > Commit 8a01ec97dc066 ("x86/mce: Mask out non-address bits from machine
> > check bank") introduced a new #define MCI_ADDR_PHYSADDR for the mask of
> > valid physical address bits within the machine check bank address register.
> >
> > This is particularly needed in the case of errors in TDX/SEAM non-root mode
> > because the reported address contains the TDX KeyID.
> >
>
> Just wondering, do you know whether this is documented anywhere?  If it is,
> I think it should be helpful if you can refer that in the changelog.

It's sort of hinted at in the SDM Vol 3B Figure 17-7. IA32_MCi_ADDR MSR
with the footnote in the diagram:

  "Useful bits in this field depend on the address methodology in use when the
   the register state is saved."

Maybe there is something more explicit in documentation for memory encryption?

-Tony