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Message-ID: <aFJgA2NmHzBI4hF_@hovoldconsulting.com>
Date: Wed, 18 Jun 2025 08:43:15 +0200
From: Johan Hovold <johan@...nel.org>
To: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
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Subject: Re: [PATCH v6 1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy:
Update pcie phy bindings for qcs8300
On Thu, May 29, 2025 at 11:56:30AM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is not required by the PCIe PHY on qcs8300 and is not
> specified in the device tree node. Hence, move the qcs8300 phy
> compatibility entry into the list of PHYs that require six clocks.
Ok, so here you fix also qcs8300, good.
> As no compatible need the entry which require seven clocks, delete it.
You still leave the bogus "phy_aux" clock under clock-names, that one
should also be dropped. And you should update clocks maxItems as well.
And please include a Fixes tag pointing out the commits that added this:
Fixes: e46e59b77a9e ("dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS8300 QMP PCIe PHY Gen4 x2")
Fixes: Fixes: fd2d4e4c1986 ("dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY")
Johan
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