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Message-ID: <1b74f11e-91f4-4aed-91eb-d54ef481eb7b@quicinc.com>
Date: Mon, 23 Jun 2025 17:16:38 +0800
From: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
To: Vinod Koul <vkoul@...nel.org>
CC: <lpieralisi@...nel.org>, <kwilczynski@...nel.org>,
<manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
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Subject: Re: [PATCH v6 1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy:
Update pcie phy bindings for qcs8300
On 6/18/2025 2:12 PM, Vinod Koul wrote:
> On 29-05-25, 11:56, Ziyue Zhang wrote:
>> The gcc_aux_clk is not required by the PCIe PHY on qcs8300 and is not
>> specified in the device tree node. Hence, move the qcs8300 phy
>> compatibility entry into the list of PHYs that require six clocks.
>>
>> As no compatible need the entry which require seven clocks, delete it.
> This fails to apply for me on phy/next, please rebase
Hi Vinod
This patch depens on sa8775p gcc_aux_clock and link_down reset change linked
in the cover letter.
BRs
Ziyue
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