linux-kernel - Re: (subset) [PATCH v6 0/6] pci: qcom: Add QCS8300 PCIe support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-Id: <176651118606.749296.7445159215784702009.b4-ty@kernel.org>
Date: Tue, 23 Dec 2025 23:03:06 +0530
From: Vinod Koul <vkoul@...nel.org>
To: lpieralisi@...nel.org, kwilczynski@...nel.org, robh@...nel.org, 
 bhelgaas@...gle.com, krzk+dt@...nel.org, neil.armstrong@...aro.org, 
 abel.vesa@...aro.org, conor+dt@...nel.org, kishon@...nel.org, 
 andersson@...nel.org, konradybcio@...nel.org, 
 Manivannan Sadhasivam <mani@...nel.org>, 
 Krzysztof Wilczyński <kwilczynski@...nel.org>, 
 Ziyue Zhang <quic_ziyuzhan@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org, 
 linux-phy@...ts.infradead.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, quic_qianyu@...cinc.com, 
 quic_krichai@...cinc.com, quic_vbadigan@...cinc.com
Subject: Re: (subset) [PATCH v6 0/6] pci: qcom: Add QCS8300 PCIe support


On Thu, 29 May 2025 11:56:29 +0800, Ziyue Zhang wrote:
> This series depend on the sa8775p gcc_aux_clock and link_down reset change
> https://lore.kernel.org/all/20250529035416.4159963-1-quic_ziyuzhan@quicinc.com/
> 
> This series adds document, phy, configs support for PCIe in QCS8300.
> It also adds 'link_down' reset for sa8775p.
> 
> Have follwing changes:
> 	- Add dedicated schema for the PCIe controllers found on QCS8300.
> 	- Add compatible for qcs8300 platform.
> 	- Add configurations in devicetree for PCIe0, including registers, clocks, interrupts and phy setting sequence.
> 	- Add configurations in devicetree for PCIe1, including registers, clocks, interrupts and phy setting sequence.
> 
> [...]

Applied, thanks!

[1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for qcs8300
      commit: 393e132efcc5e3fc4ef2bd9bbed2a096096c9359

Best regards,
-- 
~Vinod